if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) {		/*		 * save the registers before we clear them		 */		ht_regs[0] = MASKREG(htaddr->htcs1);		ht_regs[1] = MASKREG(htaddr->htds);		ht_regs[2] = MASKREG(htaddr->hter);		ht_regs[3] = MASKREG(htaddr->htmr);		ht_regs[4] = MASKREG(htaddr->htas);		ht_regs[5] = MASKREG(htaddr->htfc);		ht_regs[6] = MASKREG(htaddr->htdt);		ht_regs[7] = MASKREG(htaddr->htck);		ht_regs[8] = MASKREG(htaddr->htsn);		ht_regs[9] = MASKREG(htaddr->httc);		htaddr->htcs1 = HT_DCLR|HT_GO;		mbclrattn(mi);		if (bp != &chtbuf[htunit]) {			er &= ~HTER_FCE;			mbs &= ~(MBSR_DTABT|MBSR_MBEXC);		}		if (bp->b_flags & B_READ && ds & HTDS_PES) {			sc->sc_category_flags |= DEV_SHRTREC;			er &= ~(HTER_CSITM|HTER_CORCRC);		}		if (er & HTER_HARD || mbs & MBSR_EBITS ||		    (ds & HTDS_MOL) == 0 || er &&		    ++mi->mi_tab.b_errcnt >= 7) {			sc->sc_flags |= DEV_HARDERR;			sc->sc_hardcnt++;			if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) {				sc->sc_flags |= DEV_OFFLINE;				sc->sc_openf = -1;			}			if ((er & HTER_HARD) == HTER_FCE &&			    (mbs & MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC)			    && (ds & HTDS_MOL))				goto noprint;			mprintf("%s: unit#:%d hard err blk#:%d mbsr:%b \			        htcs1:%x htds:%x hter:%x htmr:%x htas:%x \				htfc:%x htdt:%x htck:%x htsn:%x httc:%x\n",				sc->sc_device, unit, bp->b_blkno,				mbsr, mbsr_bits, ht_regs[0], ht_regs[1], 				ht_regs[2], ht_regs[3], ht_regs[4], ht_regs[5],				ht_regs[6], ht_regs[7], ht_regs[8], ht_regs[9]);noprint:			bp->b_flags |= B_ERROR;			sc->sc_flags |= DEV_DONE;			return (MBD_DONE);		}		if (er) {			sc->sc_flags |= DEV_RETRY;			return (MBD_RETRY);		}	}	bp->b_resid = 0;	if (bp->b_flags & B_READ)		if (ds & HTDS_TM) {			sc->sc_category_flags |= DEV_TPMARK;			bp->b_resid = bp->b_bcount;			sc->sc_nxrec = bdbtofsb(bp->b_blkno);		} else if(bp->b_bcount > MASKREG(htaddr->htfc))			bp->b_resid = bp->b_bcount -				      MASKREG(htaddr->htfc);	sc->sc_flags |= DEV_DONE;	return (MBD_DONE);}htndtint(mi)	register struct mba_device *mi;{	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;	register struct tu_softc *sc;	register struct buf *bp = mi->mi_tab.b_actf;	register int htunit;	register int unit;	int er, ds, fc;	u_short ht_regs[10];	if (bp == 0) {		return (MBN_SKIP);	/* Just return if unexpected */	}	htunit = HTUNIT(bp->b_dev);	unit = UNIT(bp->b_dev);	sc = &tu_softc[unit];	sc->sc_erreg = er = MASKREG(htaddr->hter);	sc->sc_dsreg = ds = MASKREG(htaddr->htds);	sc->sc_resid = fc = MASKREG(htaddr->htfc);	if (er) {		/*		 * save the registers before we clear them		 */		ht_regs[0] = MASKREG(htaddr->htcs1);		ht_regs[1] = MASKREG(htaddr->htds);		ht_regs[2] = MASKREG(htaddr->hter);		ht_regs[3] = MASKREG(htaddr->htmr);		ht_regs[4] = MASKREG(htaddr->htas);		ht_regs[5] = MASKREG(htaddr->htfc);		ht_regs[6] = MASKREG(htaddr->htdt);		ht_regs[7] = MASKREG(htaddr->htck);		ht_regs[8] = MASKREG(htaddr->htsn);		ht_regs[9] = MASKREG(htaddr->httc);		htaddr->htcs1 = HT_DCLR|HT_GO;		mbclrattn(mi);	}	if((ds & HTDS_EOT) && (dis_eot_tu[unit] != DISEOT)) {		sc->sc_flags |= DEV_EOM;	} else {		if(dis_eot_tu[unit] != DISEOT)			sc->sc_flags &= ~(DEV_EOM|DEV_CSE);	}	if (bp == &chtbuf[htunit]) {		switch (bp->b_command) {		case HT_REWOFFL:			sc->sc_flags |= DEV_OFFLINE;			ds |= HTDS_MOL;			break;		case HT_SREV:			sc->sc_category_flags &= ~DEV_RWDING;			if (er == (HTER_NEF|HTER_FCE) && ds & HTDS_BOT &&			    bp->b_repcnt == INF) {				er &= ~HTER_NEF;				sc->sc_flags |= DEV_BOM;			}			break;		}		er &= ~HTER_FCE;		if (er == 0)			ds &= ~HTDS_ERR;	}	if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) {		sc->sc_flags |= DEV_HARDERR;		sc->sc_hardcnt++;		if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) {			sc->sc_flags |= DEV_OFFLINE;			sc->sc_openf = -1;		}		mprintf("%s: unit#:%d hard err blk#:%d \		        htcs1:%x htds:%x hter:%x htmr:%x htas:%x \			htfc:%x htdt:%x htck:%x htsn:%x httc:%x\n",			sc->sc_device, unit, bp->b_blkno,			ht_regs[0], ht_regs[1], ht_regs[2], ht_regs[3],			ht_regs[4], ht_regs[5], ht_regs[6], ht_regs[7],			ht_regs[8], ht_regs[9]);		bp->b_flags |= B_ERROR;		sc->sc_flags |= DEV_DONE;		return (MBN_DONE);	}	if (bp == &chtbuf[htunit]) {		if (sc->sc_category_flags & DEV_RWDING) {			if (ds & HTDS_BOT) {				sc->sc_flags |= (DEV_DONE | DEV_BOM);				sc->sc_dsreg &= ~HTDS_EOT;			} else {				sc->sc_flags |= DEV_RETRY;			}			return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);		}	bp->b_resid = -sc->sc_resid;	sc->sc_flags |= DEV_DONE;	return (MBN_DONE);	}	if (ds & HTDS_TM) {		sc->sc_category_flags |= DEV_TPMARK;		if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) {			sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc;			sc->sc_blkno = sc->sc_nxrec;		} else {			sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc;			sc->sc_nxrec = sc->sc_blkno - 1;		}	} else		sc->sc_blkno = bdbtofsb(bp->b_blkno);	sc->sc_flags |= DEV_RETRY;	return (MBN_RETRY);}htread(dev, uio)	register dev_t dev;	register struct uio *uio;{	register int htunit = HTUNIT(dev);	return (physio(htstrategy, &rhtbuf[htunit], dev, B_READ,		minphys, uio));}htwrite(dev, uio)	register dev_t dev;	register struct uio *uio;{	register int htunit = HTUNIT(dev);	return (physio(htstrategy, &rhtbuf[htunit], dev, B_WRITE,		minphys, uio));}htioctl(dev, cmd, data, flag)	dev_t dev;	register int cmd;	caddr_t data;	int flag;{	register struct mba_device *mi = htinfo[HTUNIT(dev)];	register struct tu_softc *sc = &tu_softc[UNIT(dev)];	register struct buf *bp = &chtbuf[HTUNIT(dev)];	register int callcount;	register int fcount;	struct mtop *mtop;	struct mtget *mtget;	struct devget *devget;	int unit = UNIT(dev);	/* we depend of the values and order of the MT codes here */	static htops[] = { HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,			   HT_REW,HT_REWOFFL,HT_SENSE };	switch (cmd) {	case MTIOCTOP:				/* tape operation */		mtop = (struct mtop *)data;		switch (mtop->mt_op) {		case MTWEOF:			callcount = mtop->mt_count;			fcount = 1;			break;		case MTFSF: case MTBSF:			callcount = mtop->mt_count;			fcount = INF;			break;		case MTFSR: case MTBSR:			callcount = 1;			fcount = mtop->mt_count;			break;		case MTREW: case MTOFFL:			sc->sc_flags &= ~DEV_EOM;			callcount = 1;			fcount = 1;			break;		case MTNOP: case MTCACHE:		case MTNOCACHE: 			return(0);		case MTCSE:			sc->sc_flags |= DEV_CSE;			sc->sc_category_flags &= ~DEV_TPMARK;			return(0);		case MTCLX: case MTCLS:			return(0);		case MTENAEOT:			dis_eot_tu[unit] = 0;			return(0);		case MTDISEOT:			dis_eot_tu[unit] = DISEOT;			sc->sc_flags &= ~DEV_EOM;			return(0);			case MTFLUSH:			/*			 * Flush controller's write back cache.  Since this			 * driver can not support this functionality, return			 * ENXIO to indicate the lack of support.			 */			return (ENXIO);		default:			return (ENXIO);		}		if (callcount <= 0 || fcount <= 0)			return (EINVAL);		while (--callcount >= 0) {			htcommand(dev, htops[mtop->mt_op], fcount);			if ((mtop->mt_op == MTFSR || mtop->mt_op			    == MTBSR) && bp->b_resid) {				return (EIO);			}			if ((bp->b_flags & B_ERROR) ||			    sc->sc_dsreg & HTDS_BOT) {				break;			}		}		return (geterror(bp));	case MTIOCGET:				/* tape status */		mtget = (struct mtget *)data;		mtget->mt_dsreg = sc->sc_dsreg;		mtget->mt_erreg = sc->sc_erreg;		mtget->mt_resid = sc->sc_resid;		mtget->mt_type = MT_ISHT;		break;	case DEVIOCGET: 			/* device status */		devget = (struct devget *)data;		bzero(devget,sizeof(struct devget));		devget->category = DEV_TAPE;		devget->bus = DEV_MB;		bcopy(DEV_TM03,devget->interface,		      strlen(DEV_TM03));		bcopy(sc->sc_device,devget->device,		      strlen(sc->sc_device));		devget->adpt_num = mi->mi_adpt; 	/* which adapter*/		devget->nexus_num = mi->mi_nexus;	/* which nexus	*/		devget->bus_num = mi->mi_mbanum;	/* which MBA	*/		devget->ctlr_num = mi->mi_drive;	/* which TM03	*/		devget->slave_num = sc->sc_slave;	/* which plug	*/		bcopy(mi->mi_driver->md_sname,		      devget->dev_name,		      strlen(mi->mi_driver->md_sname)); /* Ult. "t[eu]" */		devget->unit_num = unit;		/* which t[eu]??*/		devget->soft_count = sc->sc_softcnt;	/* soft er. cnt.*/		devget->hard_count = sc->sc_hardcnt;	/* hard er. cnt.*/		devget->stat = sc->sc_flags;		/* status	*/		devget->category_stat = sc->sc_category_flags;	/* c.st.*/		break;	default:		return (ENXIO);	}	return (0);}htdump(){	register struct mba_device *mi;	register struct mba_regs *mp;	register struct htdevice *htaddr;	register int blk;	register int num;	register int start;	start = 0;	num = maxfree;	if (htinfo[0] == 0)		return (ENXIO);	mi = PHYS(htinfo[0], struct mba_device *);	mp = PHYS(mi->mi_hd, struct mba_hd *)->mh_physmba;	mp->mba_cr = MBCR_IE;	htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];	htaddr->httc = HTTC_PDP11|HTTC_1600BPI;	htaddr->htcs1 = HT_DCLR|HT_GO;	while (num > 0) {		blk = num > DBSIZE ? DBSIZE : num;		htdwrite(start, blk, htaddr, mp);		start += blk;		num -= blk;	}	hteof(htaddr);	hteof(htaddr);	htwait(htaddr);	if (htaddr->htds&HTDS_ERR)		return (EIO);	htaddr->htcs1 = HT_REW|HT_GO;	return (0);}htdwrite(dbuf, num, htaddr, mp)	register int dbuf;	register int num;	register struct htdevice *htaddr;	register struct mba_regs *mp;{	register struct pte *io;	register int i;	htwait(htaddr);	io = mp->mba_map;	for (i = 0; i < num; i++)		*(int *)io++ = dbuf++ | PG_V;	htaddr->htfc = -(num*NBPG);	mp->mba_sr = -1;	mp->mba_bcr = -(num*NBPG);	mp->mba_var = 0;	htaddr->htcs1 = HT_WCOM|HT_GO;}htwait(htaddr)	register struct htdevice *htaddr;{	register int s;	do		s = htaddr->htds;	while ((s & HTDS_DRY) == 0);}hteof(htaddr)	register struct htdevice *htaddr;{	htwait(htaddr);	htaddr->htcs1 = HT_WEOF|HT_GO;}#endif