?? fw.lst
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C51 COMPILER V7.02a FW 06/02/2004 00:34:27 PAGE 1
C51 COMPILER V7.02a, COMPILATION OF MODULE FW
OBJECT MODULE PLACED IN fw.OBJ
COMPILER INVOKED BY: d:\Keil\C51\BIN\C51.EXE fw.c BROWSE DEBUG OBJECTEXTEND
stmt level source
1 //-----------------------------------------------------------------------------
2 // File: fw.c
3 // Contents: Firmware frameworks task dispatcher and device request parser
4 // source.
5 //
6 // indent 3. NO TABS!
7 //
8 // $Revision: 18 $
9 // $Date: 12/04/01 5:33p $
10 //
11 // Copyright (c) 1997 AnchorChips, Inc. All rights reserved
12 //-----------------------------------------------------------------------------
13 #include "fx2.h"
14 #include "fx2regs.h"
15
16 //-----------------------------------------------------------------------------
17 // Constants
18 //-----------------------------------------------------------------------------
19 #define DELAY_COUNT 0x9248*8L // Delay for 8 sec at 24Mhz, 4 sec at 48
20 #define _IFREQ 48000 // IFCLK constant for Synchronization Delay
21 #define _CFREQ 48000 // CLKOUT constant for Synchronization Delay
22
23 //-----------------------------------------------------------------------------
24 // Random Macros
25 //-----------------------------------------------------------------------------
26 #define min(a,b) (((a)<(b))?(a):(b))
27 #define max(a,b) (((a)>(b))?(a):(b))
28
29
30
31 // Registers which require a synchronization delay, see section 15.14
32 // FIFORESET FIFOPINPOLAR
33 // INPKTEND OUTPKTEND
34 // EPxBCH:L REVCTL
35 // GPIFTCB3 GPIFTCB2
36 // GPIFTCB1 GPIFTCB0
37 // EPxFIFOPFH:L EPxAUTOINLENH:L
38 // EPxFIFOCFG EPxGPIFFLGSEL
39 // PINFLAGSxx EPxFIFOIRQ
40 // EPxFIFOIE GPIFIRQ
41 // GPIFIE GPIFADRH:L
42 // UDMACRCH:L EPxGPIFTRIG
43 // GPIFTRIG
44
45 // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
46 // ...these have been replaced by GPIFTC[B3:B0] registers
47
48 #include "fx2sdly.h" // Define _IFREQ and _CFREQ above this #include
49
50 //-----------------------------------------------------------------------------
51 // Global Variables
52 //-----------------------------------------------------------------------------
53 volatile BOOL GotSUD;
54 BOOL Rwuen;
55 BOOL Selfpwr;
C51 COMPILER V7.02a FW 06/02/2004 00:34:27 PAGE 2
56 volatile BOOL Sleep; // Sleep mode enable flag
57 volatile BYTE num=0;
58 BYTE xdata Digit[] = { 0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, 0x98, 0x88, 0x83, 0xc6, 0xa1,
- 0x86, 0x8e,0x09 };
59
60 WORD pDeviceDscr; // Pointer to Device Descriptor; Descriptors may be moved
61 WORD pDeviceQualDscr;
62 WORD pHighSpeedConfigDscr;
63 WORD pFullSpeedConfigDscr;
64 WORD pConfigDscr;
65 WORD pOtherConfigDscr;
66 WORD pStringDscr;
67
68 //-----------------------------------------------------------------------------
69 // Prototypes
70 //-----------------------------------------------------------------------------
71 void SetupCommand(void);
72 void TD_Init(void);
73 void TD_Poll(void);
74 BOOL TD_Suspend(void);
75 BOOL TD_Resume(void);
76
77 BOOL DR_GetDescriptor(void);
78 BOOL DR_SetConfiguration(void);
79 BOOL DR_GetConfiguration(void);
80 BOOL DR_SetInterface(void);
81 BOOL DR_GetInterface(void);
82 BOOL DR_GetStatus(void);
83 BOOL DR_ClearFeature(void);
84 BOOL DR_SetFeature(void);
85 BOOL DR_VendorCmnd(void);
86
87 // this table is used by the epcs macro
88 const char code EPCS_Offset_Lookup_Table[] =
89 {
90 0, // EP1OUT
91 1, // EP1IN
92 2, // EP2OUT
93 2, // EP2IN
94 3, // EP4OUT
95 3, // EP4IN
96 4, // EP6OUT
97 4, // EP6IN
98 5, // EP8OUT
99 5, // EP8IN
100 };
101
102 // macro for generating the address of an endpoint's control and status register (EPnCS)
103 #define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
104
105 //-----------------------------------------------------------------------------
106 // Code
107 //-----------------------------------------------------------------------------
108
109 // Task dispatcher
110 void main(void)
111 {
112 1 DWORD i;
113 1 WORD offset;
114 1 DWORD DevDescrLen;
115 1 DWORD j=0;
116 1 WORD IntDescrAddr;
C51 COMPILER V7.02a FW 06/02/2004 00:34:27 PAGE 3
117 1 WORD ExtDescrAddr;
118 1
119 1 // Initialize Global States
120 1 Sleep = FALSE; // Disable sleep mode
121 1 Rwuen = FALSE; // Disable remote wakeup
122 1 Selfpwr = FALSE; // Disable self powered
123 1 GotSUD = FALSE; // Clear "Got setup data" flag
124 1
125 1 // Initialize user device
126 1 //TD_Init();
127 1 TD_InitSlaveFIFO();
*** WARNING C206 IN LINE 127 OF FW.C: 'TD_InitSlaveFIFO': missing function-prototype
128 1
129 1 // The following section of code is used to relocate the descriptor table.
130 1 // Since the SUDPTRH and SUDPTRL are assigned the address of the descriptor
131 1 // table, the descriptor table must be located in on-part memory.
132 1 // The 4K demo tools locate all code sections in external memory.
133 1 // The descriptor table is relocated by the frameworks ONLY if it is found
134 1 // to be located in external memory.
135 1 pDeviceDscr = (WORD)&DeviceDscr;
136 1 pDeviceQualDscr = (WORD)&DeviceQualDscr;
137 1 pHighSpeedConfigDscr = (WORD)&HighSpeedConfigDscr;
138 1 pFullSpeedConfigDscr = (WORD)&FullSpeedConfigDscr;
139 1 pStringDscr = (WORD)&StringDscr;
140 1
141 1 if ((WORD)&DeviceDscr & 0xe000)
142 1 {
143 2 IntDescrAddr = INTERNAL_DSCR_ADDR;
144 2 ExtDescrAddr = (WORD)&DeviceDscr;
145 2 DevDescrLen = (WORD)&UserDscr - (WORD)&DeviceDscr + 2;
146 2 for (i = 0; i < DevDescrLen; i++)
147 2 *((BYTE xdata *)IntDescrAddr+i) = 0xCD;
148 2 for (i = 0; i < DevDescrLen; i++)
149 2 *((BYTE xdata *)IntDescrAddr+i) = *((BYTE xdata *)ExtDescrAddr+i);
150 2 pDeviceDscr = IntDescrAddr;
151 2 offset = (WORD)&DeviceDscr - INTERNAL_DSCR_ADDR;
152 2 pDeviceQualDscr -= offset;
153 2 pConfigDscr -= offset;
154 2 pOtherConfigDscr -= offset;
155 2 pHighSpeedConfigDscr -= offset;
156 2 pFullSpeedConfigDscr -= offset;
157 2 pStringDscr -= offset;
158 2 }
159 1
160 1 EZUSB_IRQ_ENABLE(); // Enable USB interrupt (INT2)
161 1 EZUSB_ENABLE_RSMIRQ(); // Wake-up interrupt
162 1
163 1 INTSETUP |= (bmAV2EN | bmAV4EN); // Enable INT 2 & 4 autovectoring
164 1
165 1 USBIE |= bmSUDAV | bmSUTOK | bmSUSP | bmURES | bmHSGRANT ; // Enable selected interrupts
166 1 EA = 1; // Enable 8051 interrupts
167 1 EPIE |= bmBIT4;
168 1
169 1 #ifndef NO_RENUM
170 1 // Renumerate if necessary. Do this by checking the renum bit. If it
171 1 // is already set, there is no need to renumerate. The renum bit will
172 1 // already be set if this firmware was loaded from an eeprom.
173 1 if(!(USBCS & bmRENUM))
174 1 {
175 2 EZUSB_Discon(TRUE); // renumerate
176 2 }
177 1 #endif
C51 COMPILER V7.02a FW 06/02/2004 00:34:27 PAGE 4
178 1
179 1 // unconditionally re-connect. If we loaded from eeprom we are
180 1 // disconnected and need to connect. If we just renumerated this
181 1 // is not necessary but doesn't hurt anything
182 1 USBCS &=~bmDISCON;
183 1
184 1 CKCON = (CKCON&(~bmSTRETCH)) | FW_STRETCH_VALUE; // Set stretch to 0 (after renumeration)
185 1
186 1 // clear the Sleep flag.
187 1 Sleep = FALSE;
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