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<HTML><HEAD> <META NAME="GENERATOR" CONTENT="Adobe PageMill 2.0 Mac"> <TITLE>1.2 Conventions used in this document</TITLE></HEAD><BODY><P><A NAME="anchor626442"></A><HR ALIGN=LEFT></P><P><A HREF="ch01.htm">Chapter start</A> <A HREF="ch01.1.htm">Previous page</A> <A HREF="ch01.3.htm">Next page</A></P><H2>1.2 Conventions used in this document</H2><P><P CLASS="Body"><A NAME="pgfId=55"></A>This document is organized intosections, each of which focuses on some specific area of the language. Thereare subsections within each section to discuss with individual constructsand concepts. The discussion begins with an introduction and an optionalrationale for the construct or the concept, followed by syntax and semanticdescription, followed by some examples and notes.</P><P><P CLASS="Body"><A NAME="pgfId=74"></A>The use of verb "shall"is used through out the document to indicate mandatory requirements, whereasthe verb "can" is used to indicate optional features. These verbsdenote different meaning to different readers of this standard:</P><OL> <P><P CLASS="NumberedLista"><A NAME="pgfId=75"></A>a) To the developers of tools that process Verilog HDL, the verb "shall" denotes a requirement that the standard imposes. The resulting implementation is required to enforce the requirements and to issue an error if the requirement is not met by the input. <P><P CLASS="NumberedListb"><A NAME="pgfId=76"></A>b) To the Verilog HDL model developer, the verb "shall" denotes that the characteristics of Verilog HDL are natural consequences of the language definition. The model developer is required to adhere to the constraint implied by the characteristic. The verb "can" denotes optional features that the model developer can exercise at discretion. If used, however, the model developer is required to follow the requirements set forth by the language definition. <P><P CLASS="NumberedListb"><A NAME="pgfId=77"></A>c) To the Verilog HDL model user, the verb "shall" denotes that the characteristics of the models are natural consequences of the language definition. The model user can depend on the characteristics of the model implied by its Verilog HDL source text.</OL><P><A HREF="ch01.htm">Chapter start</A> <A HREF="ch01.1.htm">Previous page</A> <A HREF="ch01.3.htm">Next page</A></BODY></HTML>
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