#-----------------------------------------------------------------------------# MS Visual C makefile for compiling and testing the G.726# implementation. # The executable must be defined by variable G726 below.# History:# 31.Jan.2000 - Implemented by <simao.campos@labs.comsat.com># NOTE: you need to get (purchase) the G.726 test vectors from the ITU in #       order to perform the (optional) compliance test.#-----------------------------------------------------------------------------# ------------------------------------------------# Choose compiler. # ------------------------------------------------CC=clCC_OPT = -I../utl /Yd /DEBUG# ------------------------------------------------# General purpose symbols# ------------------------------------------------G726 = g726demoVBR = vbr-g726 -qDIFF = cf -qRM=rm -f# ------------------------------------------------# Choose an archiving utility: #	- public domain unzip, or [PC/Unix/VMS]#	- shareware pkunzip [PC only]# ------------------------------------------------#UNZIP = pkunzip UNZIP = unzip -o# ------------------------------------------------# File lists# ------------------------------------------------TEST_VECTORS =  *.?16 *.?24 *.?32 *.?40 *.recDEMO_OBJ = g726demo.obj g726.objVBR_OBJ = vbr-g726.obj g726.obj g711.obj# ------------------------------------------------# Targets# ------------------------------------------------all:: g726demo vbr-g726anyway: clean allclean:	$(RM) *.obj cleantest:	$(RM) $(TEST_VECTORS) voicvbra.tst voicvbru.tst voicvbrl.tst	$(RM) voice.src voicevbr.arf voicevbr.lrf voicevbr.urfveryclean: clean cleantest	$(RM) g726demo.exe vbr-g726.exe# -----------------------------------------------------------------------------# Generic rules# -----------------------------------------------------------------------------.c.obj:	$(CC) $(CC_OPT) -c $<# -----------------------------------------------------------------------------# Specific rules# -----------------------------------------------------------------------------vbr-g726: vbr-g726.exeg726demo: g726demo.exevbr-g726.exe: $(VBR_OBJ)	$(CC) -o vbr-g726 $(CC_OPT) $(VBR_OBJ) g726demo.exe: $(DEMO_OBJ)	$(CC) -o g726demo $(CC_OPT) $(DEMO_OBJ) g726demo.obj: g726demo.c	$(CC) -c $(CC_OPT) -I../g711 g726demo.cg726.obj:	g726.c	$(CC) -c $(CC_OPT) g726.cg711.obj:	../g711/g711.c	$(CC) -c $(CC_OPT) -I../g711 ../g711/g711.cvbr-g726.obj: vbr-g726.c	$(CC) -c $(CC_OPT) -I../g711 vbr-g726.c# ----------------------------------------#  Very simple portability test# ----------------------------------------test: test-vbr-quickproc: proc-vbr-quickcomp: comp-vbr-quicktest-vbr-quick: proc-vbr-quick comp-vbr-quickproc-vbr-quick: voice.src	$(VBR) -q -law A -rate 16-24-32-40-32-24 voice.src voicvbra.tst	$(VBR) -q -law l -rate 16-24-32-40-32-24 voice.src voicvbrl.tst	$(VBR) -q -law u -rate 16-24-32-40-32-24 voice.src voicvbru.tstcomp-vbr-quick: voicevbr.arf	$(DIFF) voicvbra.tst voicevbr.arf	$(DIFF) voicvbrl.tst voicevbr.lrf	$(DIFF) voicvbru.tst voicevbr.urfvoice.src: tst-g726.zip	$(UNZIP) tst-g726.zip voice.src	sb -over voice.srcvoicevbr.arf: tst-g726.zip	$(UNZIP) tst-g726.zip voicevbr.arf voicevbr.lrf voicevbr.urf	swapover voicevbr.arf voicevbr.lrf voicevbr.urf# -----------------------------------------------------------------------------# Test the implementation for g726demo (compliance)# In the automatic compliance testing, g726demo.c is verified by test-tv# For vbr-g726.c, no differences should be observed, since both use g726.c, # and differ only on the demo logic. For full compliance testing of the # vbr-g726.c program, use test-tv-vbr# -----------------------------------------------------------------------------test-tv: proc-tv-fix comp-tvproc-tv-fix: bin/rn16fa.o clean proc16-fix proc24-fix proc32-fix proc40-fixcomp-tv-fix: comp-tvcomp-tv: comp16 comp24 comp32 comp40 proc16-fix:## Process ADPCM/ Coder for normal and overload sequences, A law#	$(G726) a load 16 bin/nrm.a nrm.a16 256 1 64	$(G726) a load 16 bin/ovr.a ovr.a16 256 1 8## Process ADPCM/ Decoder for normal and overload sequences, A law#	$(G726) a adlo 16 bin/rn16fa.i rn16fa.rec 256 1 64	$(G726) a adlo 16 bin/rv16fa.i rv16fa.rec 256 1 8## Process ADPCM/ Cross-decoder for normal and overload sequences, #                A law input -> ADPCM 16kbit/s -> mu law output#	$(G726) u adlo 16 bin/rn16fa.i rn16fx.rec 256 1 64	$(G726) u adlo 16 bin/rv16fa.i rv16fx.rec 256 1 8### Process ADPCM/ Coder for normal and overload sequences, mu law#	$(G726) u load 16 bin/nrm.m nrm.m16 256 1 64	$(G726) u load 16 bin/ovr.m ovr.m16 256 1 8## Process ADPCM/ Decoder for normal and overload sequences, mu law#	$(G726) u adlo 16 bin/rn16fm.i rn16fm.rec 256 1 64	$(G726) u adlo 16 bin/rv16fm.i rv16fm.rec 256 1 8## Process ADPCM/ Cross-decoder for normal and overload sequences, #                mu law input -> ADPCM 16kbit/s -> A law output#	$(G726) a adlo 16 bin/rn16fm.i rn16fc.rec 256 1 64	$(G726) a adlo 16 bin/rv16fm.i rv16fc.rec 256 1 8### Process ADPCM/ Decode-only for the same input ADPCM sequence, A and mu law#	$(G726) a adlo 16 bin/i16 ri16fa.rec 256 1 64	$(G726) u adlo 16 bin/i16 ri16fm.rec 256 1 64comp16:## =================================================================#  COMPARISON OF FILES !# =================================================================## Compare ADPCM/ Coder for normal and overload sequences, A law#	$(DIFF) bin/rn16fa.i nrm.a16 256 1 64 	$(DIFF) bin/rv16fa.i ovr.a16 256 1 8 ## Compare ADPCM/ Decoder for normal and overload sequences, A law#	$(DIFF) bin/rn16fa.o rn16fa.rec 256 1 64 	$(DIFF) bin/rv16fa.o rv16fa.rec 256 1 8 ## Compare ADPCM/ Cross-decoder for normal and overload sequences, #                A law input -> ADPCM x kbit/s -> mu law output#	$(DIFF) bin/rn16fx.o rn16fx.rec 256 1 64 	$(DIFF) bin/rv16fx.o rv16fx.rec 256 1 8 ### Compare ADPCM/ Coder for normal and overload sequences, mu law#	$(DIFF) bin/rn16fm.i nrm.m16 256 1 64 	$(DIFF) bin/rv16fm.i ovr.m16 256 1 8 ## Compare ADPCM/ Decoder for normal and overload sequences, mu law#	$(DIFF) bin/rn16fm.o rn16fm.rec 256 1 64 	$(DIFF) bin/rv16fm.o rv16fm.rec 256 1 8 ## Compare ADPCM/ Cross-decoder for normal and overload sequences, #                mu law input -> ADPCM x kbit/s -> A law output#	$(DIFF) bin/rn16fc.o rn16fc.rec 256 1 64 	$(DIFF) bin/rv16fc.o rv16fc.rec 256 1 8 ### Compare ADPCM/ Decode-only for the same input ADPCM sequence, A and mu law#	$(DIFF) bin/ri16fa.o ri16fa.rec 256 1 64 	$(DIFF) bin/ri16fm.o ri16fm.rec 256 1 64 proc24-fix:### Process ADPCM/ Coder for normal and overload sequences, A law#	$(G726) a load 24 bin/nrm.a nrm.a24 256 1 64	$(G726) a load 24 bin/ovr.a ovr.a24 256 1 8## Process ADPCM/ Decoder for normal and overload sequences, A law#	$(G726) a adlo 24 bin/rn24fa.i rn24fa.rec 256 1 64	$(G726) a adlo 24 bin/rv24fa.i rv24fa.rec 256 1 8## Process ADPCM/ Cross-decoder for normal and overload sequences, #                A law input -> ADPCM 24kbit/s -> mu law output#	$(G726) u adlo 24 bin/rn24fa.i rn24fx.rec 256 1 64	$(G726) u adlo 24 bin/rv24fa.i rv24fx.rec 256 1 8### Process ADPCM/ Coder for normal and overload sequences, mu law#	$(G726) u load 24 bin/nrm.m nrm.m24 256 1 64	$(G726) u load 24 bin/ovr.m ovr.m24 256 1 8## Process ADPCM/ Decoder for normal and overload sequences, mu law#	$(G726) u adlo 24 bin/rn24fm.i rn24fm.rec 256 1 64	$(G726) u adlo 24 bin/rv24fm.i rv24fm.rec 256 1 8## Process ADPCM/ Cross-decoder for normal and overload sequences, #                mu law input -> ADPCM 24kbit/s -> A law output#	$(G726) a adlo 24 bin/rn24fm.i rn24fc.rec 256 1 64	$(G726) a adlo 24 bin/rv24fm.i rv24fc.rec 256 1 8### Process ADPCM/ Decode-only for the same input ADPCM sequence, A and mu law#	$(G726) a adlo 24 bin/i24 ri24fa.rec 256 1 64	$(G726) u adlo 24 bin/i24 ri24fm.rec 256 1 64comp24:## =================================================================#  COMPARISON OF FILES !# =================================================================## Compare ADPCM/ Coder for normal and overload sequences, A law#	$(DIFF) bin/rn24fa.i nrm.a24 256 1 64 	$(DIFF) bin/rv24fa.i ovr.a24 256 1 8 ## Compare ADPCM/ Decoder for normal and overload sequences, A law#	$(DIFF) bin/rn24fa.o rn24fa.rec 256 1 64 	$(DIFF) bin/rv24fa.o rv24fa.rec 256 1 8 ## Compare ADPCM/ Cross-decoder for normal and overload sequences, #                A law input -> ADPCM x kbit/s -> mu law output#	$(DIFF) bin/rn24fx.o rn24fx.rec 256 1 64 	$(DIFF) bin/rv24fx.o rv24fx.rec 256 1 8 ### Compare ADPCM/ Coder for normal and overload sequences, mu law#	$(DIFF) bin/rn24fm.i nrm.m24 256 1 64 	$(DIFF) bin/rv24fm.i ovr.m24 256 1 8 ## Compare ADPCM/ Decoder for normal and overload sequences, mu law#	$(DIFF) bin/rn24fm.o rn24fm.rec 256 1 64 	$(DIFF) bin/rv24fm.o rv24fm.rec 256 1 8 ## Compare ADPCM/ Cross-decoder for normal and overload sequences, #                mu law input -> ADPCM x kbit/s -> A law output#	$(DIFF) bin/rn24fc.o rn24fc.rec 256 1 64 	$(DIFF) bin/rv24fc.o rv24fc.rec 256 1 8 ### Compare ADPCM/ Decode-only for the same input ADPCM sequence, A and mu law#