/********************************************************************/
/*                                                                  */
/*      Board Specific Routines for KS32C50100                      */
/*                                                                  */
/*------------------------------------------------------------------*/
/*      Copyright (C) 1997 Integrated System Inc.                   */
/*      Copyright (C) 1997 Samsung Electronics.                     */
/*------------------------------------------------------------------*/
/*                                                                  */
/*      Modified, programmed by qorrha                              */
/*                                                                  */
/*      Description : 1998-05-01 first edited  for KS32C50100       */ 
/********************************************************************/

#ifndef _BSP_PIC_H_
#define _BSP_PIC_H_


/*Bit position of IRQ_SET_REG,RST_REG,MASK_REG */

#define	EXT0_INT		0x000001
#define	EXT1_INT		0x000002
#define	EXT2_INT		0x000004
#define	EXT3_INT		0x000008

#define	UART0_TX_INT		0x000010
#define	UART0_RX_ERR_INT	0x000020
#define	UART1_TX_INT		0x000040
#define	UART1_RX_ERR_INT	0x000080
#define	GDMA0_INT		0x000100
#define	GDMA1_INT		0x000200
#define	TIMER0_INT		0x000400
#define	TIMER1_INT		0x000800
#define	HDLCTxA_INT		0x001000
#define	HDLCRxA_INT		0x002000
#define	HDLCTxB_INT		0x004000
#define	HDLCRxB_INT		0x008000


#define	BDMA_TX_INT		0x010000
#define	BDMA_RX_INT		0x020000
#define	MAC_TX_INT		0x040000
#define	MAC_RX_INT		0x080000
#define	IIC_INT			0x100000
#define	GLOBAL_INT		0x200000


#define	nEXT0_INT		0
#define	nEXT1_INT		1
#define	nEXT2_INT		2
#define	nEXT3_INT		3

#define	nUART0_TX_INT		4
#define	nUART0_RX_ERR_INT	5
#define	nUART1_TX_INT		6
#define	nUART1_RX_ERR_INT	7
#define	nGDMA0_INT		8
#define	nGDMA1_INT		9
#define	nTIMER0_INT		10
#define	nTIMER1_INT		11
#define	nHDLCTxA_INT		12
#define	nHDLCRxA_INT		13
#define	nHDLCTxB_INT		14
#define	nHDLCRxB_INT		15

#define	nBDMA_TX_INT		16
#define	nBDMA_RX_INT		17
#define	nMAC_TX_INT		18
#define	nMAC_RX_INT		19
#define	nIIC_INT		20
#define	nGLOBAL_INT		21


/* Macro fucntions */

#define	Enable_Int(n)           INTMASK &= ~(1<<(n))
#define	Disable_Int(n)		INTMASK |= (1<<(n))
#define Clear_PendingBit(n)     INTPEND = (1<<(n))
#define SetPendingBit(n)        INTPNDTST = (1<<(n))


/* 
 *     Prototype for interrupt functions 
 */


#define	MAXHNDLRS	21	/* Maximum # of interrupt  handlers */

/* Function Prototype for Interrupt */
extern void InitInterrupt(void) ;
extern void ClrIntStatus(void);  // Clear all interrupt related register


/* Function Prototype for Exception Vector */
extern void ISR_UndefHandler(REG32 *adr);
extern void ISR_PrefetchHandler(REG32 *adr);
extern void ISR_AbortHandler(REG32 *adr);
extern void ISR_SwiHandler(void);
extern void ISR_IrqHandler(void);
extern void ISR_FiqHandler(void);



/* Function Prototype for Interrupt Setup */
extern void SysSetInterrupt(REG32 vector, void (*)()) ;
extern void SetPriority(void);
extern void SetIntMode(void);

/*  =================================================
 *  Monitoring the interrupt related system register
 *  =================================================
 */
extern void IntConfig(void);


#endif /*  _BSP_PIC_H_ */