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README.CFFT4      Example 21160 complex radix-4 FFT Program

Analog Devices, Inc.
DSP Division
Three Technology Way
P.O. Box 9106
Norwood, MA 02062

14-JUN-2000 GGL

This directory contains an example ADSP-21160, single-channel, SIMD subroutine 
that implements a radix-4 FFT of length 64 or greater. A 
detailed discussion of the complex radix-4 FFT algorithm can be found in the 
source header comments of "HHCFFT4.ASM".  This is example is not fully optimized 
for SIMD.  A fully optimized complex radix-4 SIMD will be released at a later date.

Files contained in this directory:

HCFFT4.dpj	    VisualDSP project file
HHCFFT4.asm	    ADSP-21160 source for a complex radix-4 FFT example.
HHCFFT4_test.asm    Calling function for HHCFFT4.asm
ADSP-21160.ldf      Linker description file 
HHCFFT4.dxe	    Executable created for this project
inreal.dat	    Randomly generated real input to FFT
inimag.dat	    Randomly generated imaginary input to FFT
Cosr4.dat           Cosine array FFT twiddle factors
Sinr4.dat           Sine array FFT twiddle factors
outreal_expHH.dat   expected real output of the complex radix-4 FFT
outimag_expHH.dat   expected imaginary output of the complex radix-4 FFT

64.zip		    contains data, twiddle factors and a text file discribing 		      necessary modifications for a 64 point complex radix-4 FFT
4096.zip   	    contains data, twiddle factors and a text file discribing             necessary modifications for a 4096 point complex radix-4 FFT
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CONTENTS

I.    FUNCTION/ALGORITHM DESCRIPTION
II.   IMPLEMENTATION DESCRIPTION
III.  DESCRIPTION OF INPUT DATA 
        1.  Input Samples 
        2.  Twiddle Factors  
	3.  Changing The Sample Fft To Accomidate A Different Length
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I. FUNCTION/ALGORITHM DESCRIPTION

The project HCFFT4.dpj contains an implementation of a complex input radix-4 FFT. This routine has been optimized for the SIMD architecture of the ADSP-21160 
SIMD SHARC to leverage the instruction level parallelism inherent in the FFT 
algorithm.

This radix-4 FFT routine will take data lengths that are any power of four (>= 64 points).


II.   IMPLEMENTATION DESCRIPTION

This FFT implementation takes advantage of the SIMD architecture of the 
ADSP-21160. Single Channel data optimization has been employed to perform half 
of the processing of the FFT butterflies on each of the 21160 Processing 
Elements. Single-channel optimization can be implemented in algorithms where 
there is no data dependency between consecutive iterations for a single data 
set.

Because there is no data dependency between iterations in the  butterfly 
computations, it is possible to do half the butterflies in each of the two 
processing elements.


1. INPUT SAMPLES:
-----------------

The files, inreal.dat and inimag.dat, contain the real and imaginary input data for the FFT.  The length of the files depends on the length of the FFT.  


2. TWIDDLE FACTOR DATA:
-----------------------

Generate seperate files for the sine and cosine twiddle factors.  Be sure to generated the twiddle factors based on the length of your FFT.


3. CHANGING THE SAMPLE FFT TO ACCOMIDATE A DIFFERENT LENGTH:
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21160 - Complex Radix-4 FFT 

In order to perform FFTs of different lengths, the following code changes are 
necessary:
(The rules/relations described in the source code must be followed!)

 - Modify N to reflect the length of the FFT to be performed (N must be a power of 4)
 - Modify STAGES such that STAGES = (log4(N))
 - Mofify OST such that OST = bitrev(32 bit N/2)
 - No changes to OIM or ORE are required unless data placement must be changed


/*_________The constants below must be changed for different length FFTs______
N         = number of points in the FFT, must be a power of 4
STAGES    = log4(N)
OST = bitrev(32 bit N/2)
ORE = bitrev(32 bit addr of input real in dm), addr is 0,N,2N,3N,...
OIM = bitrev(32 bit addr of input imag in pm), addr is 0,N,2N,3N,...
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