.module do_RLR16;
.entry RLR16;

RLR16:
        i0=h#0407;      { h#0407 = bitrev(^tmp+8) when ^tmp=h#3800 }
        i1=i0;
        m0=2048;        { bitrev modifier = 16384/N = 2048 }
        ena bit_rev;
                        ay0=dm(i0,m0);
                        si=dm(i0,m0);
        sr=ashift si (hi),      dm(i1,m0)=ay0;
        ar=sr1-ay0,     si=dm(i0,m0);
        af=-ar,                 dm(i1,m0)=ar;
        
        cntr=5;
        do rlrx16 until ce;
                sr=ashift si (hi);
                ar=sr1+af,      si=dm(i0,m0);
        rlrx16: af=-ar,                 dm(i1,m0)=ar;
   
        sr=ashift si (hi);
        ar=sr1+af;
                                dm(i1,m0)=ar;
        dis bit_rev;
        rts;
.endmod;