/*H**************************************************************************
* NAME:         mmc_drv.h         
*----------------------------------------------------------------------------
* Copyright (c) 2002 Atmel.
*----------------------------------------------------------------------------
* RELEASE:      snd1c-demo-hdd-0_2_0      
* REVISION:     1.6     
*----------------------------------------------------------------------------
* PURPOSE:
* This file contains the MMC driver definitions
*****************************************************************************/

#ifndef _MMC_DRV_H_
#define _MMC_DRV_H_

/*_____ I N C L U D E S ____________________________________________________*/


/*_____ M A C R O S ________________________________________________________*/


/* Commands */
#define MMC_GO_IDLE_STATE         ((Byte)0)
#define MMC_SEND_OP_COND          ((Byte)1)
#define MMC_ALL_SEND_CID          ((Byte)2)
#define MMC_SET_RELATIVE_ADDRESS  ((Byte)3)
#define MMC_SET_DSR               ((Byte)4)
#define MMC_SELECT_CARD           ((Byte)7)
#define MMC_SEND_CSD              ((Byte)9)
#define MMC_SEND_CID              ((Byte)10)
#define MMC_READ_DATA_UNTIL_STOP  ((Byte)11)
#define MMC_STOP_TRANSMISSION     ((Byte)12)
#define MMC_SEND_STATUS           ((Byte)13)
#define MMC_GO_INACTIVE_STATE     ((Byte)15)
#define MMC_SET_BLOCK_LEN         ((Byte)16)
#define MMC_READ_SINGLE_BLOCK     ((Byte)17)
#define MMC_WRITE_DATA_UNTIL_STOP ((Byte)20)
#define MMC_WRITE_SINGLE_BLOCK    ((Byte)24)
#define MMC_PROGRAM_CSD           ((Byte)27)
#define MMC_TAG_SECTOR_START      ((Byte)32)
#define MMC_TAG_SECTOR_END        ((Byte)33)
#define MMC_UNTAG_SECTOR          ((Byte)34)
#define MMC_TAG_ERASE_GRP_START   ((Byte)35)
#define MMC_TAG_ERASE_GRP_END     ((Byte)36)
#define MMC_UNTAG_ERASE_GRP       ((Byte)37)
#define MMC_ERASE                 ((Byte)38)

/* Responses */
#define MMC_OCR_INIT              ((Uint32)0x80100000)
#define MMC_BUSY_OCR              ((Byte)0x80)
#define MMC_STBY_STATE_MSK        ((Uint32)0x01D81E00)
#define MMC_STBY_STATE            ((Uint32)0x00000600)  /* stby state */
#define MMC_DATA_STATE_MSK        ((Uint32)0xE0040E00)
#define MMC_DATA_STATE            ((Uint32)0x00000A00)  /* data state */
#define MMC_RCV_STATE_MSK         ((Uint32)0xE0020E00)
#define MMC_RCV_STATE             ((Uint32)0x00000A00)  /* rcv state */
#define MMC_TRAN_STATE_MSK        ((Uint32)0xE0020E00)
#define MMC_TRAN_STATE            ((Uint32)0x00000800)  /* tran state */

/* CSD register */
#define CSD_POS_RBP               ((Byte)6)
#define CSD_MSK_RBP               ((Byte)0x80)
#define CSD_POS_RBL               ((Byte)5)
#define CSD_MSK_RBL               ((Byte)0x0F)
#define CSD_POS_CSH               ((Byte)6)
#define CSD_POS_CSM               ((Byte)7)
#define CSD_POS_CSL               ((Byte)8)
#define CSD_MSK_CSH               ((Byte)0x03)
#define CSD_MSK_CSL               ((Byte)0xC0)
#define CSD_MSK_CSM               ((Byte)0x07)
#define CSD_BLEN_2048             ((Byte)11)
#define CSD_BLEN_512              ((Byte)9)

/* Functions parameters & returns */
#define MMC_NO_ARG                ((Uint32)0xFFFFFFFF)  /* [31:0] Stuff bits */
#define MMC_NO_RESP               ((Byte)0)
#define MMC_RESP_R1               ((Byte)1)
#define MMC_RESP_R2               ((Byte)2)
#define MMC_RESP_R3               ((Byte)3)
#define MMC_RESP_R4               ((Byte)4)
#define MMC_RESP_R5               ((Byte)5)

#define MMC_ERR_RESP              ((bit)FALSE)
#define MMC_RESP_OK               ((bit)TRUE)


/*_____ D E F I N I T I O N ________________________________________________*/


/*_____ D E C L A R A T I O N ______________________________________________*/

/* Control */
void    mmc_set_prio (Byte);
void    mmc_send_cmd (Byte, Uint32, Byte);
bit     mmc_check_response (void);

#define Mmc_set_clock(clock)      (MMCLK = clock)
#define Mmc_reset()               (MMCON2 |= (MSK_DCR | MSK_CCR)); (MMCON2 &= ~(MSK_DCR | MSK_CCR))
#define Mmc_reset_cmd_fifos()     (MMCON0 |= (MSK_CRPTR | MSK_CTPTR)); (MMCON0 &= ~(MSK_CRPTR | MSK_CTPTR))
#define Mmc_reset_data_fifos()    (MMCON0 |= (MSK_DRPTR | MSK_DTPTR)); (MMCON0 &= ~(MSK_DRPTR | MSK_DTPTR))
#define Mmc_enable()              (MMCON2 |= MSK_MMCEN)
#define Mmc_disable()             (MMCON2 &= ~MSK_MMCEN)
#define Mmc_mask_int_set(i)       (MMMSK |= (i))
#define Mmc_mask_int_clr(i)       (MMMSK &= ~(i))
#define Mmc_mask_int_inv(i)       (MMMSK ^= i)
#define Mmc_enable_int()          (IEN1 |= MSK_EMMC)
#define Mmc_disable_int()         (IEN1 &= ~MSK_EMMC)
#define Mmc_card_busy()           ((MMSTA & MSK_CBUSY) == MSK_CBUSY)
#define Mmc_enable_flow_ctrl()    (MMCON2 |= MSK_FLOWC)
#define Mmc_disable_flow_ctrl()   (MMCON2 &= ~MSK_FLOWC)

/* Data */
#define Mmc_set_write()           (MMCON1 |= MSK_DATDIR)
#define Mmc_set_read()            (MMCON1 &= ~MSK_DATDIR)
#define Mmc_set_block_size(s)     (MMCON1 = (MMCON1 & ~MSK_BLEN) | (s << 4))
#define Mmc_rd_block_size()       ((MMCON1 & MSK_BLEN) >> 4)
#define Mmc_set_stream()          (MMCON0 &= ~MSK_DFMT)
#define Mmc_set_multi_block()     (MMCON0 |= (MSK_MBLOCK | MSK_DFMT))
#define Mmc_set_single_block()    (MMCON0 |= MSK_DFMT); (MMCON0 &= ~MSK_MBLOCK)
#define Mmc_enable_send()         (MMCON1 |= MSK_DATEN); (MMCON1 &= ~MSK_DATEN)
#define Mmc_rd_byte()             (MMDAT)
#define Mmc_rd_word()             ((Uint16)(MMDAT | (MMDAT << 8)))
#define Mmc_wr_byte(b)            (MMDAT = b)
#define Mmc_write_ready()         ((MMINT & MSK_F2FI) != MSK_F2FI)
#define Mmc_write_busy()          ((MMINT & MSK_F1EI) != MSK_F1EI)
#define Mmc_read_ready()          ((MMINT & MSK_F1FI) == MSK_F1FI)
#define Mmc_end_of_block_read()   ((MMINT & (MSK_F2EI | MSK_F1EI)) == (MSK_F2EI | MSK_F1EI))
#define Mmc_data_sent()           ((MMINT & MSK_EOFI) == MSK_EOFI)

/* Command & Response */
void    mmc_send_cmd (Byte, Uint32, Byte);
void    mmc_send_scmd (Byte, Byte);
Uint32  mmc_read_response (void);

#define Mmc_rd_cmd()              (MMCMD)
#define Mmc_wr_cmd(b)             (MMCMD = b)
#define Mmc_command_sent()        ((MMINT & MSK_EOCI) == MSK_EOCI)
#define Mmc_response_received()   ((MMINT & MSK_EORI) == MSK_EORI)
#define Mmc_write_block_cmd(a)    mmc_send_cmd(MMC_WRITE_SINGLE_BLOCK, a, MMC_RESP_R1)
#define Mmc_read_block_cmd(a)     mmc_send_cmd(MMC_READ_SINGLE_BLOCK, a, MMC_RESP_R1)
#define Mmc_read_stream_cmd(a)    mmc_send_cmd(MMC_READ_DATA_UNTIL_STOP, a, MMC_RESP_R1)
#define Mmc_stop_stream_cmd()     mmc_send_scmd(MMC_STOP_TRANSMISSION, MMC_RESP_R1)


#endif /* _MMC_DRV_H_ */