?? sndsend.h
字號:
/* sndsEnd.h - END style Samsung SNDS Ethernet interface header */
/* Copyright 1999 Mistral Solutions Pvt Ltd */
/*
modification history
--------------------
01a,06sep99,knp support for snds
*/
#ifndef __INCsndsEndh
#define __INCsndsEndh
#ifdef __cplusplus
extern "C" {
#endif
#include "end.h"
#include "netBufLib.h"
#include "snds100.h"
/*
* Our MAC address definition. User can change this value as
* per requirement
*/
unsigned char sndsEndEnetAddr[6] = {0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff};
/** PHY definitions **/
#define PHY_CONTROL_REG 0
#define PHY_ADDR 0
#define _AUTO_NEGOTIATE 0x1000
#define _10_MB_HDX 0
#define _100_MB_FDX 0x2100
#define _100_MB_HDX 0x2000
#define BRxEn 0x4000
#define BRxNO 0x4
/*********added by knp/nts 9/9/99***************
* the following describes the structure for the
* transmit and receive frame descriptors.
*/
struct FD_TX_CONTROL_PACKED
{
UINT32 p_bit:1;
UINT32 c_bit:1;
UINT32 t_bit:1;
UINT32 l_bit:1;
UINT32 a_bit:1;
UINT32 wa_bit:2;
UINT32 reserved_bit:25;
}__attribute__((__packed__));
typedef struct FD_TX_CONTROL_PACKED FD_TX_CONTROL;
struct FD_TX_FRAMEDATA_PACKED
{
UINT32 frameDataPtr:31;
UINT32 o_bit:1;
}__attribute__((__packed__));
typedef struct FD_TX_FRAMEDATA_PACKED FD_TX_FRAME_DATA;
struct FD_TX_STATUS_LENGTH_PACKED
{
UINT32 frameLength:16;
UINT32 txCollCnt:4;
UINT32 exColl:1;
UINT32 txDefer:1;
UINT32 paused:1;
UINT32 intTx:1;
UINT32 underRun:1;
UINT32 deferAl:1;
UINT32 ncArr:1;
UINT32 sqeErr:1;
UINT32 lateColl:1;
UINT32 txPar:1;
UINT32 comp:1;
UINT32 txHalted:1;
}__attribute__((__packed__));
typedef struct FD_TX_STATUS_LENGTH_PACKED FD_TX_STATUS_LENGTH;
struct TRANSMIT_FRAME_DESC_PACKED
{
FD_TX_FRAME_DATA txFrameData;
FD_TX_CONTROL txControl;
FD_TX_STATUS_LENGTH txStatusLength;
struct TRANSMIT_FRAME_DESC_PACKED *nextTxFrameDesc;
}__attribute__((__packed__));
typedef struct TRANSMIT_FRAME_DESC_PACKED TRANSMIT_FRAME_DESC;
struct FD_RX_FRAME_DATA_PACKED
{
UINT32 frameDataPtr:31;
UINT32 o_bit:1;
}__attribute__((__packed__));
typedef struct FD_RX_FRAME_DATA_PACKED FD_RX_FRAME_DATA;
struct FD_RX_STATUS_LENGTH_PACKED
{
UINT32 frameLength:16;
UINT32 empty0:3;
UINT32 ovMax:1;
UINT32 empty1:1;
UINT32 ctlRcv:1;
UINT32 intRx:1;
UINT32 rx10Stat:1;
UINT32 alignErr:1;
UINT32 crcErr:1;
UINT32 overFlow:1;
UINT32 longErr:1;
UINT32 empty2:1;
UINT32 rxPar:1;
UINT32 good:1;
UINT32 rxHalted:1;
}__attribute__((__packed__));
typedef struct FD_RX_STATUS_LENGTH_PACKED FD_RX_STATUS_LENGTH;
struct RECEIVE_FRAME_DESC_PACKED /* receive frame descriptor */
{
FD_RX_FRAME_DATA rxFrameData;
UINT32 reserved;
FD_RX_STATUS_LENGTH rxStatusLength;
struct RECEIVE_FRAME_DESC_PACKED *nextRxFrameDesc;
}__attribute__((__packed__));
typedef struct RECEIVE_FRAME_DESC_PACKED RECEIVE_FRAME_DESC;
struct BDMARXCON_PACKED
{
UINT32 burstSize:5;
UINT32 stop_skipFrame:1;
UINT32 memAddrsInc_Dec:1;
UINT32 recvFrameIntrEnb:1;
UINT32 nullListIntrEnb:1;
UINT32 notOwnerIntrEnb:1;
UINT32 maxSizeOverIntrEnb:1;
UINT32 big_LittleEndian:1;
UINT32 wordAlign:2;
UINT32 enable:1;
UINT32 reset:1;
UINT32 buffEmptyIntr:1;
UINT32 erlyNotifyIntr:1;
UINT32 reserved_0:14;
}__attribute__((__packed__));
union UNION_BDMARXCON
{
struct BDMARXCON_PACKED rxCon_reg;
UINT32 rxCon_resetval;
}__attribute__((__packed__));
typedef union UNION_BDMARXCON BDMARXCON;
struct BDMATXCON_PACKED
{
UINT32 burstSize:5;
UINT32 stop_skipFrame:1;
UINT32 reserved_0:1;
UINT32 sendCntrlPacketIntrEnb:1;
UINT32 nullListIntrEnb:1;
UINT32 notOwnerIntrEnb:1;
UINT32 buffEmptyIntrEnb:1;
UINT32 macTxStartLevel:3;
UINT32 enable:1;
UINT32 reset:1;
UINT32 reserved_1:16;
}__attribute__((__packed__));
union UNION_BDMATXCON
{
struct BDMATXCON_PACKED txCon_reg;
UINT32 txCon_resetval;
}__attribute__((__packed__));
typedef union UNION_BDMATXCON BDMATXCON;
struct BDMARXLSZ_PACKED
{
UINT32 bdmaRxMaxSize:16;
UINT32 bdmaRxFrameLength:16;
}__attribute__((__packed__));
union UNION_BDMARXLSZ
{
struct BDMARXLSZ_PACKED rxLsz_reg;
UINT32 rxLsz_resetval;
}__attribute__((__packed__));
typedef union UNION_BDMARXLSZ BDMARXLSZ;
struct BDMASTAT_PACKED
{
UINT32 bdmaRxDoneEveryRxFrame:1;
UINT32 bdmaRxNullList:1;
UINT32 bdmaRxNotOwner:1;
UINT32 bdmaRxMaxSizeOver:1;
UINT32 bdmaRxBuffEmpty:1;
UINT32 bdmaRxEarlyNotify:1;
UINT32 bdmaRxReserved:1;
UINT32 bdmaRxOneMoreFrame:1;
UINT32 bdmaRxNumofFrames_Buff:8;
UINT32 bdmaTxCompleteToSendCntrlPacket:1;
UINT32 bdmaTxNullList:1;
UINT32 bdmaTxNotOwner:1;
UINT32 bdmaTxReserved_0:1;
UINT32 bdmaTxBuffEmpty:1;
UINT32 bdmaTxReserved_1:11;
}__attribute__((__packed__));
union UNION_BDMASTAT
{
struct BDMASTAT_PACKED stat_reg;
UINT32 stat_resetval;
}__attribute__((__packed__));
typedef union UNION_BDMASTAT BDMASTAT;
struct MACCON_PACKED
{
UINT32 haltRequest:1;
UINT32 haltImm:1;
UINT32 swReset:1;
UINT32 fullDup:1;
UINT32 macLoop:1;
UINT32 reserved_0:1;
UINT32 mii_off:1;
UINT32 loop10:1;
UINT32 reserved_1:2;
UINT32 missRoll:1;
UINT32 reserved_2:1;
UINT32 mdc_off:1;
UINT32 enMissRoll:1;
UINT32 reserved_3:1;
UINT32 linkStatus:1;
UINT32 reserved_4:16;
}__attribute__((__packed__));
union UNION_MACCON
{
struct MACCON_PACKED macCon_reg;
UINT32 macCon_resetval;
}__attribute__((__packed__));
typedef union UNION_MACCON MACCON;
struct CAMCON_PACKED
{
UINT32 stationAccept:1;
UINT32 groupAccept:1;
UINT32 broadcastAccept:1;
UINT32 negCam:1;
UINT32 cmpEnable:1;
UINT32 reserved_0:27;
}__attribute__((__packed__));
union UNION_CAMCON
{
struct CAMCON_PACKED camCon_reg;
UINT32 camCon_resetval;
}__attribute__((__packed__));
typedef union UNION_CAMCON CAMCON;
struct MACTXCON_PACKED
{
UINT32 transmitEnable:1;
UINT32 transmitHaltReq:1;
UINT32 suppressPadding:1;
UINT32 suppressCRC:1;
UINT32 fastBackOff:1;
UINT32 noDefer:1;
UINT32 sendPause:1;
UINT32 sqeTestModeEnable:1;
UINT32 enableUnderRun:1;
UINT32 enableDeferral:1;
UINT32 enableNoCarrier:1;
UINT32 enableExcessCollision:1;
UINT32 enableLateCollison:1;
UINT32 enableTxParity:1;
UINT32 enableCompletion:1;
UINT32 reserved_0:17;
}__attribute__((__packed__));
union UNION_MACTXCON
{
struct MACTXCON_PACKED macTxCon_reg;
UINT32 macTxCon_resetval;
}__attribute__((__packed__));
typedef union UNION_MACTXCON MACTXCON;
struct MACTXSTAT_PACKED
{
UINT32 transmitCollCount:4;
UINT32 excessiveCollision:1;
UINT32 transmitDeferred:1;
UINT32 paused:1;
UINT32 intrOnTransmit:1;
UINT32 underRun:1;
UINT32 deferral:1;
UINT32 noCarrier:1;
UINT32 sqe:1;
UINT32 lateCollision:1;
UINT32 transmitParityError:1;
UINT32 completion:1;
UINT32 transmissionHalted:1;
UINT32 reserved_0:16;
}__attribute__((__packed__));
union UNION_MACTXSTAT
{
struct MACTXSTAT_PACKED macTxStat_reg;
UINT32 macTxStat_resetval;
}__attribute__((__packed__));
typedef union UNION_MACTXSTAT MACTXSTAT;
struct MACRXCON_PACKED
{
UINT32 receiveEnable:1;
UINT32 receiveHaltReq:1;
UINT32 longEnable:1;
UINT32 shortEnable:1;
UINT32 stripCRCVal:1;
UINT32 passCtrlPacket:1;
UINT32 ignoreCRCValue:1;
UINT32 reserved_0:1;
UINT32 enableAlignment:1;
UINT32 enableCRCError:1;
UINT32 enableOverFlow:1;
UINT32 enableLongError:1;
UINT32 reserved_1:1;
UINT32 enableReceiveParity:1;
UINT32 enableGood:1;
UINT32 reserved_2:17;
}__attribute__((__packed__));
union UNION_MACRXCON
{
struct MACRXCON_PACKED macRxCon_reg;
UINT32 macRxCon_resetval;
}__attribute__((__packed__));
typedef union UNION_MACRXCON MACRXCON;
struct MACRXSTAT_PACKED
{
UINT32 reserved_0:5;
UINT32 ctrlFrameReceived:1;
UINT32 intrOnReceive:1;
UINT32 receive10MbStatus:1;
UINT32 alignmentError:1;
UINT32 crcError:1;
UINT32 overflowError:1;
UINT32 longError:1;
UINT32 reserved_1:1;
UINT32 receiveParityError:1;
UINT32 goodReceived:1;
UINT32 receptionHalted:1;
UINT32 reserved_2:16;
}__attribute__((__packed__));
union UNION_MACRXSTAT
{
struct MACRXSTAT_PACKED macRxCon_reg;
UINT32 macRxCon_resetval;
}__attribute__((__packed__));
typedef union UNION_MACRXSTAT MACRXSTAT;
struct STACON_PACKED
{
UINT32 phyRegisterAddr:5;
UINT32 phyAddr:5;
UINT32 write:1;
UINT32 busy:1;
UINT32 preambleSuppress:1;
UINT32 mdc_Clockrating:3;
UINT32 reserved_0:16;
}__attribute__((__packed__));
union UNION_STACON
{
struct STACON_PACKED staCon_reg;
UINT32 staCon_resetval;
}__attribute__((__packed__));
typedef union UNION_STACON STACON;
struct CAMEN_PACKED
{
UINT32 camEnable:21;
UINT32 reserved_0:11;
}__attribute__((__packed__));
union UNION_CAMEN
{
struct CAMEN_PACKED camen_reg;
UINT32 camen_resetval;
}__attribute__((__packed__));
typedef union UNION_CAMEN CAMEN;
struct EMISSCNT_PACKED
{
UINT32 alignmentErrorCount:16;
UINT32 reserved_0:16;
}__attribute__((__packed__));
union UNION_EMISSCNT
{
struct EMISSCNT_PACKED emisscnt_reg;
UINT32 emisscnt_resetval;
}__attribute__((__packed__));
typedef union UNION_EMISSCNT EMISSCNT;
typedef struct etherStatistics
{
/* Receive statistics counters from */
UINT32 rxGood;
UINT32 rxBad;
UINT32 rxOvMaxSize;
UINT32 rxCtlRecd;
UINT32 rx10Stat;
UINT32 rxAlignErr;
UINT32 rxCRCErr;
UINT32 rxOverflowErr;
UINT32 rxLongErr;
UINT32 rxParErr;
UINT32 rxHalted;
/* Transmit statistics counters */
UINT32 txGood;
UINT32 txUnderErr;
UINT32 txExCollErr;
UINT32 txDeferredErr;
UINT32 txPaused;
UINT32 txDeferErr;
UINT32 txNCarrErr;
UINT32 txSQE;
UINT32 txLateCollErr;
UINT32 txParErr;
UINT32 txHalted;
} ETHER_STATISTICS;
/**********BDMA control registers **************/
#define SNDS_BDMATXCON (ASIC_BASE+0x9000)
#define SNDS_BDMARXCON (ASIC_BASE+0x9004)
#define SNDS_BDMATXPTR (ASIC_BASE+0x9008)
#define SNDS_BDMARXPTR (ASIC_BASE+0x900C)
#define SNDS_BDMARXLSZ (ASIC_BASE+0x9010)
#define SNDS_BDMASTAT (ASIC_BASE+0x9014)
#define SNDS_CAM_BASE (ASIC_BASE+0x9100)
#define SNDS_CAM0 (ASIC_BASE+0x9100) /* Content Addressable Memory registers */
#define SNDS_CAM1 (ASIC_BASE+0x9106)
#define SNDS_CAM2 (ASIC_BASE+0x910C)
#define SNDS_CAM3 (ASIC_BASE+0x9112)
#define SNDS_CAM4 (ASIC_BASE+0x9118)
#define SNDS_CAM5 (ASIC_BASE+0x911e)
#define SNDS_CAM6 (ASIC_BASE+0x9124)
#define SNDS_CAM7 (ASIC_BASE+0x912a)
#define SNDS_CAM8 (ASIC_BASE+0x9130)
#define SNDS_CAM9 (ASIC_BASE+0x9136)
#define SNDS_CAM10 (ASIC_BASE+0x913c)
#define SNDS_CAM11 (ASIC_BASE+0x9142)
#define SNDS_CAM12 (ASIC_BASE+0x9148)
#define SNDS_CAM13 (ASIC_BASE+0x914e)
#define SNDS_CAM14 (ASIC_BASE+0x9154)
#define SNDS_CAM15 (ASIC_BASE+0x915a)
#define SNDS_CAM16 (ASIC_BASE+0x9160)
#define SNDS_CAM17 (ASIC_BASE+0x9166)
#define SNDS_CAM18 (ASIC_BASE+0x916c)
#define SNDS_CAM19 (ASIC_BASE+0x9172)
#define SNDS_CAM20 (ASIC_BASE+0x9178)
/*******Buffer registers for debug pupose ***/
#define SNDS_BDMATXBUF (ASIC_BASE+0x9200) /* to be removed after driver development */
#define SNDS_BDMARXBUF (ASIC_BASE+0x9800)
/***********MAC control registers**************/
#define SNDS_MACCON (ASIC_BASE+0xA000)
#define SNDS_CAMCON (ASIC_BASE+0xA004)
#define SNDS_MACTXCON (ASIC_BASE+0xA008)
#define SNDS_MACTXSTAT (ASIC_BASE+0xA00C)
#define SNDS_MACRXCON (ASIC_BASE+0xA010)
#define SNDS_MACRXSTAT (ASIC_BASE+0xA014)
#define SNDS_STADATA (ASIC_BASE+0xA018)
#define SNDS_STACON (ASIC_BASE+0xA01C)
#define SNDS_CAMEN (ASIC_BASE+0xA028)
#define SNDS_EMISSCNT (ASIC_BASE+0xA03C)
#define SNDS_EPZCNT (ASIC_BASE+0xA040)
#define SNDS_ERMPZCNT (ASIC_BASE+0xA044)
#define SNDS_ETXSTAT (ASIC_BASE+0x9040)
#ifdef __cplusplus
}
#endif
#endif /* __INCsndsEndh */
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -