/* sndsHdlcEnd.h - END style Samsung snds HDLC  interface header */

/* Copyright 1999 Mistral Solutions Pvt Ltd */

/*
modification history
--------------------
01a,22sep99,Ak  support for HDLC interface for the SNDS100 board
*/

#ifndef __INCsndsHdlcEndh
#define __INCsndsHdlcEndh

#ifdef __cplusplus
extern "C" {
#endif

#include "end.h"
#include "netBufLib.h"
#include "snds100.h"

/*
 * Address and mask for each HDLC channel
 */
UINT32 sndsHdlcChanAAddr[2]= {0x00010203, 0xFF000000};
UINT32 sndsHdlcChanBAddr[2]= {0x01020304, 0xFF000000};

/* Register address offset definitions of HDLC */

#define	HDLC_CHANNELA_BASE		0x7000
#define	HDLC_CHANNELB_BASE		0x8000
#define SNDS_HMODE				0x0000			
#define SNDS_HCON				0x0004
#define SNDS_HSTAT				0x0008
#define SNDS_HINTEN				0x000C
#define SNDS_HTXFIFOC			0x0010
#define SNDS_HTXFIFOT			0x0014
#define SNDS_HRXFIFO			0x0018
#define SNDS_HBRGTC				0x001C
#define SNDS_HPRMB				0x0020
#define SNDS_HSAR0				0x0024
#define SNDS_HSAR1				0x0028
#define SNDS_HSAR2				0x002C
#define SNDS_HSAR3				0x0030
#define SNDS_HMASK				0x0034
#define SNDS_HDMATXPTR			0x0038
#define SNDS_HDMARXPTR			0x003C
#define SNDS_HMFLR				0x0040
#define SNDS_HRBSR				0x0044

/*HDLC Mode Register Definitions(HMODE)*/

struct HDLC_HMODE_PACKED
	{
	UINT32 mfinfifo:1;
	UINT32 reserved_0:3;
	UINT32 rxlittle:1;  
	UINT32 txlittle:1;  
	UINT32 reserved_1:2;
	UINT32 txpl:3;
	UINT32 reserved_2:1;     
	UINT32 dformat:3;
	UINT32 reserved_3:1;
	UINT32 dpllclock:3;
	UINT32 brgclock:1;
	UINT32 txclock:3;
	UINT32 reserved_4:1;
	UINT32 rxclock:3;
	UINT32 reserved_5:1;
	UINT32 txoutput:3;
	UINT32 reserved_6:1;
	}__attribute__((__packed__));
union UNION_HMODE
	{
		struct HDLC_HMODE_PACKED	hmode_reg;
		UINT32 hmode_resetval;
	}__attribute__((__packed__)); 
typedef union UNION_HMODE HDLC_HMODE;

	
/*HDLC Configuration  Register Definitions(HCON)*/
struct HDLC_HCON_PACKED 
	{
	
	UINT32 txrs:1;
	UINT32 rxrs:1;
	UINT32 dtxrs:1;
	UINT32 drxrs:1;
	UINT32 txen:1;
	UINT32 rxen:1;
	UINT32 dtxen:1;
	UINT32 drxen:1;
	UINT32 dpllen:1;
	UINT32 brgen:1;
	UINT32 txwd:1;
	UINT32 rxwd:1;
	UINT32 rxwa:2;
	UINT32 dtxstsk:1;
	UINT32 drxstsk:1;
	UINT32 drxmadec:1;
	UINT32 txflag:1;
	UINT32 txdflag:1;
	UINT32 txloop:1;
	UINT32 rxecho:1;
	UINT32 txabtext:1;
	UINT32 txabt:1;
	UINT32 txprmb:1;
	UINT32 txdtr:1;
	UINT32 rxdiscon:1;
	UINT32 txnocrc:1;
	UINT32 rxnocrc:1;
	UINT32 autoen:1;
	UINT32 reserved:3;
	}__attribute__((__packed__));

union UNION_HCON	
	{
		struct HDLC_HCON_PACKED	hcon_reg;
		UINT32 hcon_resetval;
	}__attribute__((__packed__)); 
typedef union UNION_HCON HDLC_HCON;



/*HDLC Status Register (HSTAT)*/

struct HDLC_HSTAT_PACKED
	{
	
	UINT32 rxrb:4;
	UINT32 txfc:1;
	UINT32 txfa:1;
	UINT32 txcts:1;
	UINT32 txscts:1;
	UINT32 txu:1;
	UINT32 rxfa:1;
    UINT32 reserved_0:1;
	UINT32 rxfd:1;
	UINT32 rxdcd:1;
	UINT32 rxsdcd:1;
	UINT32 rxfv:1;
	UINT32 rxidle:1;
	UINT32 rxabt:1;
	UINT32 rxcrce:1;
	UINT32 rxno:1;
	UINT32 rxov:1;
	UINT32 rxmov:1;
    UINT32 reserved_1:1;
	UINT32 dtxabt:1;
	UINT32 rxierr:1;
	UINT32 drxfd:1;
	UINT32 drxnl:1;
	UINT32 drxno:1;
	UINT32 dtxfd:1;
	UINT32 dtxnl:1;
	UINT32 dtxno:1;
	UINT32 dpllom:1;
	UINT32 dplltm:1;
	}__attribute__((__packed__));
union UNION_HSTAT	
	{
		struct HDLC_HSTAT_PACKED hstat_reg;
		UINT32 hstat_resetval;
	}__attribute__((__packed__)); 
typedef union UNION_HSTAT HDLC_HSTAT;



/* HDLC Interrupt Enable Register (HINTEN)*/
struct HDLC_HINTEN_PACKED
	{
	UINT32 reserved_0:4;
	UINT32 txfcie:1;
	UINT32 txfaie:1;
	UINT32 reserved_1:1;
	UINT32 txsctsie:1;
	UINT32 txuie:1;
	UINT32 rxfaie:1;
	UINT32 reserved_2:1;
	UINT32 rxfdie:1;
	UINT32 reserved_3:1;
	UINT32 rxsdcdie:1;
	UINT32 rxfvie:1;
	UINT32 rxidleie:1;
	UINT32 rxabtie:1;
	UINT32 rxcrceie:1;
	UINT32 rxnoie:1;
	UINT32 rxovie:1;
	UINT32 rxmovie:1;
	UINT32 reserved_4:1;
	UINT32 dtxabtie:1;
	UINT32 rxierrie:1;
	UINT32 drxfdie:1;
	UINT32 drxnlie:1;
	UINT32 drxnoie:1;
	UINT32 dtxfdie:1;
	UINT32 dtxnlie:1;
	UINT32 dtxnoie:1;
	UINT32 dpllomie:1;
	UINT32 dplltmie:1;
	}__attribute__((__packed__));
union UNION_HINTEN	
	{
		struct HDLC_HINTEN_PACKED hinten_reg;
		UINT32 hinten_resetval;
	}__attribute__((__packed__)); 
typedef union UNION_HINTEN HDLC_HINTEN;

	
/*HDLC BRG Time Constant Register*/
struct HDLC_HBRGTC_PACKED
	{
		UINT32 cnt_2:2;
		UINT32 cnt_1:2;
		UINT32 cnt_0:12;
	}__attribute__((__packed__));
union UNION_HBRGTC
	{
		struct HDLC_HBRGTC_PACKED hbrgtc_reg;
		UINT32 hbrgtc_resetval;
	}__attribute__((__packed__)); 
typedef union UNION_HBRGTC HDLC_HBRGTC;

/* HDLC Preamble Constant Register */

#define PREAMBLE_NRZ	0xAA
#define PREAMBLE_NRZI	0x00
#define PREAMBLE_FM0	0xFF
#define PREAMBLE_FM1	0x00
#define PREAMBLE_MAN	0xAA

/* RX/TX Frame Definitions*/

#define MAXFRAMEDATA 	1510
#define MAXFRAMELENGTH 	1510
#define MAXTXBDCOUNT	128	
#define MAXRXBDCOUNT	128 

/* HDLC Tx Buffer Descriptor (HTxBD)*/

#define BOWNERSHIP_CPU  0x7fffffff		
#define BOWNERSHIP_DMA  0x80000000
#define PREAMBLE        0x01
#define TXNOCRCM        0x02
#define LITTLE          0x04
#define LASTBF          0x08 
#define BDPDEC          0x10 
#define BDWA0	        0
#define BDWA1	        0x20  
#define BDWA2	        0x40  
#define BDWA3	        0x60  
#define TXCOMP          0x4000000

/* HDLC Rx Buffer Descriptor (HRxBD)*/

#define CDLOST              0x00000001           
#define CRCE                0x00000002           
#define NONOCTET            0x00000004           
#define OVERRUN             0x00000008           
#define DTM                 0x00000010           
#define ABT                 0x00000020           
#define FRAMEF              0x00000040           
#define FRAMEL              0x00000080           
#define FLV                 0x00000100           


/* Buffer Descriptor*/
typedef struct BD 
	{
	UINT32 BufferDataPtr;
	UINT32 Reserved;
	UINT32 StatusLength;
	struct BD *NextBD ;
	}SNDSHDLCBD;

typedef struct HDLCFRAME
	{
		UINT8 address[4];
		UINT8 control;
		UINT8 information[1505];
	} SNDSHDLCFRAME;


typedef struct HdlcTxStatus {
	UINT32 TxFrameComp ;
	UINT32 TxFIFOAvail ;
	UINT32 CTSstate ;
	UINT32 CTSstore ;
	UINT32 TxUnderrun ;
	UINT32 DMATxABT ;
	UINT32 DMATxFD ;
	UINT32 DMATxNL ;
	UINT32 DMATxNO ;
} SHTXSTATUS ;

/* HDLC Rx Status Structure*/
typedef struct HdlcRxStatus {
	UINT32 RxFIFOAvail;
	UINT32 RxFlagDetected ;
	UINT32 DCDstate ;
	UINT32 DCDstore ;
	UINT32 RxFValid ;
	UINT32 RxIdle ;
	UINT32 RxAbort ;
	UINT32 RxCRCErr ;
	UINT32 RxNonOctet ;
	UINT32 RxOverrun ;
	UINT32 DMARxMOV ;
	UINT32 RxInterErr ;
	UINT32 DMARxFD ;
	UINT32 DMARxNL ;
	UINT32 DMARxNO ;
	UINT32 DMARxABT ;
} SHRXSTATUS ;

#ifdef __cplusplus

}
#endif

#endif /* __INCsndsHdlcEndh */