//
// Copyright (c) Microsoft Corporation.  All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//

/*++
THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
PARTICULAR PURPOSE.


Module Name:    HWCTXT.CPP

Abstract:        Platform dependent code for the mixing audio driver.

Notes:            The following file contains all the hardware specific code
                for the mixing audio driver.  This code's primary responsibilities
                are:

                    * Initialize audio hardware (including codec chip)
                    * Schedule DMA operations (move data from/to buffers)
                    * Handle audio interrupts

                All other tasks (mixing, volume control, etc.) are handled by the "upper"
                layers of this driver.

                ****** IMPORTANT ******
                For the S3C6410 CPU, DMA channel 2 can be used for both input and output.  In this,
                configuration, however, only one type operation (input or output) can execute.  In
                order to implement simultaneous playback and recording, two things must be done:

                    1) Input DMA should be moved to DMA Channel 1; Output DMA still uses DMA Channel 2.
                    2) Step #3 in InterruptThread() needs to be implemented so that the DMA interrupt
                       source (input DMA or output DMA?) can be determined.  The interrupt source needs
                       to be determined so that the appropriate buffers can be copied (Steps #4,#5...etc.).

                Lastly, the m_OutputDMAStatus and m_InputDMAStatus variables shouldn't need to be modified.
                The logic surrounding these drivers is simply used to determine which buffer (A or B) needs
                processing.

-*/

#include "wavemain.h"
#include <ceddk.h>
#include <bsp_cfg.h>
#include <s3c6410.h>
#include "WM8580.h"

#include <iic.h>
#include "s3c6410_iis_interface.h"
#include "s3c6410_dma_controller.h"
#include "hwctxt.h"

typedef enum
{
    DMA_CH_OUT    = 0x1,
    DMA_CH_IN        = 0x2
} DMA_CH_SELECT;


#define WAV_MSG(x)
#define WAV_INF(x)    DEBUGMSG(ZONE_FUNCTION, x)
#define WAV_ERR(x)    DEBUGMSG(ZONE_ERROR, x)


#define INTERRUPT_THREAD_PRIORITY_DEFAULT    (150)

#define CHIP_ID                         (0x36)        // WM8580 Chip ID
#define WM8580_READ                (CHIP_ID + 1)
#define WM8580_WRITE            (CHIP_ID + 0)

HardwareContext *g_pHWContext        = NULL;

static volatile S3C6410_IIS_REG        *g_pIISReg = NULL;
static volatile S3C6410_GPIO_REG    *g_pGPIOReg = NULL;
static volatile S3C6410_DMAC_REG    *g_pDMAC0Reg = NULL;
static volatile S3C6410_DMAC_REG    *g_pDMAC1Reg = NULL;
static volatile S3C6410_SYSCON_REG    *g_pSysConReg = NULL;

static DMA_CH_CONTEXT    g_OutputDMA;
static DMA_CH_CONTEXT    g_InputDMA;
static PHYSICAL_ADDRESS    g_PhyDMABufferAddr;


BOOL
HardwareContext::CreateHWContext(DWORD Index)
{
    if (g_pHWContext)
    {
        return(TRUE);
    }

    g_pHWContext = new HardwareContext;
    if (g_pHWContext == NULL)
    {
        return(FALSE);
    }

    return(g_pHWContext->Initialize(Index));
}


HardwareContext::HardwareContext()
: m_InputDeviceContext(), m_OutputDeviceContext()
{
    InitializeCriticalSection(&m_csLock);
    m_bInitialized = FALSE;
}


HardwareContext::~HardwareContext()
{
    DeleteCriticalSection(&m_csLock);
}


BOOL
HardwareContext::Initialize(DWORD Index)
{
    BOOL bRet;
    DWORD dwErr, bytes;
    UINT32 uiIICDelay;

    if (m_bInitialized)
    {
        return(FALSE);
    }

    m_DriverIndex = Index;
    m_InPowerHandler = FALSE;

    m_bOutputDMARunning = FALSE;
    m_bInputDMARunning = FALSE;
    m_bSavedInputDMARunning = FALSE;
    m_bSavedOutputDMARunning = FALSE;
    m_InputDMAStatus    = DMA_CLEAR;
    m_OutputDMAStatus = DMA_CLEAR;
    m_nOutByte[OUTPUT_DMA_BUFFER0] = 0;
    m_nOutByte[OUTPUT_DMA_BUFFER1] = 0;
    m_nInByte[INPUT_DMA_BUFFER0] = 0;
    m_nInByte[INPUT_DMA_BUFFER1] = 0;

    m_dwSysintrOutput = NULL;
    m_dwSysintrInput = NULL;
    m_hOutputDMAInterrupt = NULL;
    m_hInputDMAInterrupt = NULL;
    m_hOutputDMAInterruptThread = NULL;
    m_hInputDMAInterruptThread = NULL;

    m_dwOutputGain = 0xFFFF;
    m_dwInputGain = 0xFFFF;
    m_bOutputMute = FALSE;
    m_bInputMute = FALSE;

    m_NumForcedSpeaker = 0;

    // Map Virtual Address for SFR
    bRet = MapRegisters();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : MapRegisters() Failed\n\r")));
        goto CleanUp;
    }

    // Allocation and Map DMA Buffer
    bRet = MapDMABuffers();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : MapDMABuffers() Failed\n\r")));
        goto CleanUp;
    }

    //Open handle to the I2C bus
    m_hI2C = CreateFile( L"IIC0:",
                        GENERIC_READ|GENERIC_WRITE,
                        FILE_SHARE_READ|FILE_SHARE_WRITE,
                        NULL, OPEN_EXISTING, 0, 0);
    if ( m_hI2C == INVALID_HANDLE_VALUE )
    {
        dwErr = GetLastError();
        WAV_ERR((_T("[WAV:ERR] Initialize() : I2C0: Device Open Failed = 0x%08x\n\r"), dwErr));
        goto CleanUp;
    }
    
    uiIICDelay = Clk_0;
    
    bRet = DeviceIoControl(m_hI2C,
                      IOCTL_IIC_SET_DELAY, 
                      &uiIICDelay, sizeof(UINT32), 
                      NULL, 0,
                      &bytes, NULL);
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : I2C0: Device Set Delay Failed.\n\r")));
        goto CleanUp;
    }

    // Enable Clock for IIS CH0
    // PCLK Case
    //g_pSysConReg->CLKSRC = (g_pSysConReg->CLKSRC & ~(0x7<<7)) | (0x /// ????? No config data for CLKSRC on F/W code.. WHY???
    g_pSysConReg->PCLK_GATE |= (1<<26);
    g_pSysConReg->SCLK_GATE |= (1<<11);

    // Initialize SFR address for PDD Library
    IIS_initialize_register_address((void *)g_pIISReg, (void *)g_pGPIOReg);
    DMA_initialize_register_address((void *)g_pDMAC0Reg, (void *)g_pDMAC1Reg, (void *)g_pSysConReg);

    // Initialize IIS interface
    IIS_initialize_interface();

    // Initialize Audio Codec
    bRet = InitIISCodec();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : InitIISCodec(() Failed\n\r")));
        goto CleanUp;
    }

    // Request DMA Channel and Initialize
    // DMA context have Virtual IRQ Number of Allocated DMA Channel
    // You Should initialize Interrupt after DMA initialization
    bRet = InitOutputDMA();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : InitOutputDMA() Failed\n\r")));
        goto CleanUp;
    }

    bRet = InitInputDMA();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : InitInputDMA() Failed\n\r")));
        goto CleanUp;
    }

    // Initialize Interrupt
    bRet = InitInterruptThread();
    if (bRet == FALSE)
    {
        WAV_ERR((_T("[WAV:ERR] Initialize() : InitInterruptThread() Failed\n\r")));
        goto CleanUp;
    }

    // Set HwCtxt Initialize Flag
    m_bInitialized = TRUE;

    //-----------------------------------------------
    // Power Manager expects us to init in D0.
    // We are normally in D4 unless we are opened for play.
    // Inform the PM.
    //-----------------------------------------------
    m_Dx = D0;
    DevicePowerNotify(_T("WAV1:"),(_CEDEVICE_POWER_STATE)D4, POWER_NAME);

CleanUp:

    return bRet;
}


BOOL
HardwareContext::Deinitialize()
{
    if (m_bInitialized)
    {
        DeinitInterruptThread();

        StopOutputDMA();
        StopInputDMA();
        DMA_release_channel(&g_OutputDMA);
        DMA_release_channel(&g_InputDMA);

        CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);

        UnMapDMABuffers();
        UnMapRegisters();
    }

    return TRUE;
}


void
HardwareContext::PowerUp()
{
    WAV_MSG((_T("[WAV] ++PowerUp()\n\r")));

    // Enable Clock for IIS CH0
    g_pSysConReg->PCLK_GATE |= (1<<26);
    g_pSysConReg->SCLK_GATE |= (1<<11);

    IIS_initialize_interface();

    InitIISCodec();

    CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);

    WAV_MSG((_T("[WAV] --PowerUp()\n\r")));
}


void HardwareContext::PowerDown()
{
    WAV_MSG((_T("[WAV] ++PowerDown()\n\r")));

    CodecMuteControl(DMA_CH_OUT|DMA_CH_IN, TRUE);
    CodecPowerControl();

    // Disable Clock for IIS CH0
    g_pSysConReg->PCLK_GATE &= ~(1<<26);
    g_pSysConReg->SCLK_GATE &= ~(1<<11);

    WAV_MSG((_T("[WAV] --PowerDown()\n\r")));
}


DWORD
HardwareContext::Open(void)
{
    DWORD mmErr = MMSYSERR_NOERROR;
    DWORD dwErr;

    // Don't allow play when not on, if there is a power constraint upon us.
    if ( D0 != m_Dx )
    {
        // Tell the Power Manager we need to power up.
        // If there is a power constraint then fail.
        dwErr = DevicePowerNotify(_T("WAV1:"), D0, POWER_NAME);
        if ( ERROR_SUCCESS !=  dwErr )
        {
            WAV_ERR((_T("[WAV:ERR] Open() : DevicePowerNotify Error : %u\r\n"), dwErr));
            mmErr = MMSYSERR_ERROR;
        }
    }

    return mmErr;
}


DWORD
HardwareContext::Close(void)
{
    DWORD mmErr = MMSYSERR_NOERROR;
    DWORD dwErr;

    // we are done so inform Power Manager to power us down, 030711
    dwErr = DevicePowerNotify(_T("WAV1:"), (_CEDEVICE_POWER_STATE)D4, POWER_NAME);
    if ( ERROR_SUCCESS !=  dwErr )
    {
        WAV_ERR((_T("[WAV:ERR] Close() : DevicePowerNotify Error : %u\r\n"), dwErr));
        mmErr = MMSYSERR_ERROR;
    }

    return mmErr;
}


BOOL
HardwareContext::IOControl(
            DWORD  dwOpenData,
            DWORD  dwCode,
            PBYTE  pBufIn,
            DWORD  dwLenIn,
            PBYTE  pBufOut,
            DWORD  dwLenOut,
            PDWORD pdwActualOut)
{
    DWORD dwErr = ERROR_SUCCESS;
    BOOL  bRc = TRUE;

    UNREFERENCED_PARAMETER(dwOpenData);

    switch (dwCode)
    {
    //-----------------
    // Power Management
    //-----------------
    case IOCTL_POWER_CAPABILITIES:
        {
            PPOWER_CAPABILITIES ppc;

            if ( !pdwActualOut || !pBufOut || (dwLenOut < sizeof(POWER_CAPABILITIES)) )
            {
                bRc = FALSE;
                dwErr = ERROR_INVALID_PARAMETER;
                WAV_ERR((_T("[WAV:ERR] IOCTL_POWER_CAPABILITIES : Invalid Parameter\n\r")));
                break;
            }

            ppc = (PPOWER_CAPABILITIES)pBufOut;

            memset(ppc, 0, sizeof(POWER_CAPABILITIES));

            ppc->DeviceDx = 0x11;    // support D0, D4
            ppc->WakeFromDx = 0x0;    // no wake
            ppc->InrushDx = 0x0;        // no inrush

            // REVIEW: Do we enable all these for normal playback?
            // D0: SPI + I2S + CODEC (Playback) + Headphone=
            //     0.5 mA + 0.5 mA + (23 mW, into BUGBUG ohms ) + (30 mW, into 32 ohms)
            //     500 uA + 500 uA + 23000 uA + 32000 uA
            ppc->Power[D0] = 56000;

            // Report our nominal power consumption in uAmps rather than mWatts.
            ppc->Flags = POWER_CAP_PREFIX_MICRO | POWER_CAP_UNIT_AMPS;

            *pdwActualOut = sizeof(POWER_CAPABILITIES);
        }
        break;

    case IOCTL_POWER_SET:
        {
            CEDEVICE_POWER_STATE NewDx;

            if ( !pdwActualOut || !pBufOut || (dwLenOut < sizeof(CEDEVICE_POWER_STATE)) )
            {
                bRc = FALSE;
                dwErr = ERROR_INVALID_PARAMETER;
                WAV_ERR((_T("[WAV:ERR] CEDEVICE_POWER_STATE : Invalid Parameter\n\r")));
                break;
            }

            NewDx = *(PCEDEVICE_POWER_STATE)pBufOut;

            if ( VALID_DX(NewDx) )
            {
                // grab the CS since the normal Xxx_PowerXxx can not.
                switch (NewDx)
                {
                case D0:
                    if (m_Dx != D0)
                    {
                        m_Dx = D0;