// No done bits set- must not be my interrupt
        return 0;
    case DMA_DONEA|DMA_DONEB|DMA_BIU:
        // Load B, then A
        BytesTransferred = FillOutputBuffer(OUTPUT_DMA_BUFFER1);
        // fall through
    case DMA_DONEA: // This should never happen!
    case DMA_DONEA|DMA_BIU:
        BytesTransferred += FillOutputBuffer(OUTPUT_DMA_BUFFER0);        // charlie, A => B
        break;
    case DMA_DONEA|DMA_DONEB:
        // Load A, then B
        BytesTransferred = FillOutputBuffer(OUTPUT_DMA_BUFFER0);
        BytesTransferred += FillOutputBuffer(OUTPUT_DMA_BUFFER1);
        break;
    case DMA_DONEB|DMA_BIU: // This should never happen!
    case DMA_DONEB:
        // Load B
        BytesTransferred += FillOutputBuffer(OUTPUT_DMA_BUFFER1);        // charlie, B => A
        break;
    }

    // If it was our interrupt, but we weren't able to transfer any bytes
    // (e.g. no full buffers ready to be emptied)
    // and all the output DMA buffers are now empty, then stop the output DMA
    BytesTotal = m_nOutByte[OUTPUT_DMA_BUFFER0]+m_nOutByte[OUTPUT_DMA_BUFFER1];

    if (BytesTotal == 0)
    {
        StopOutputDMA();
    }
    else
    {
        StartOutputDMA();        // for DMA resume when wake up
    }

    return BytesTransferred;
}


ULONG
HardwareContext::FillOutputBuffer(int nBufferNumber)
{
    ULONG BytesTransferred = 0;
    PBYTE pBufferStart = m_OutputDMABufferVirPage[nBufferNumber];
    PBYTE pBufferEnd = pBufferStart + AUDIO_DMA_PAGE_SIZE;
    PBYTE pBufferLast;

    WAV_MSG((_T("[WAV] FillOutputBuffer(%d)\n\r"), nBufferNumber));

    __try
    {
        pBufferLast = m_OutputDeviceContext.TransferBuffer(pBufferStart, pBufferEnd, NULL);

        BytesTransferred = pBufferLast-pBufferStart;
        m_nOutByte[nBufferNumber] = BytesTransferred;

        // Enable if you need to clear the rest of the DMA buffer
        StreamContext::ClearBuffer(pBufferLast, pBufferEnd);

        if(nBufferNumber == OUTPUT_DMA_BUFFER0)            // Output Buffer A
        {
            m_OutputDMAStatus &= ~DMA_DONEA;
            m_OutputDMAStatus |= DMA_STRTA;
        }
        else                                // Output Buffer B
        {
            m_OutputDMAStatus &= ~DMA_DONEB;
            m_OutputDMAStatus |= DMA_STRTB;
        }
    }
    __except(GetExceptionCode()==STATUS_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH)
    {
        WAV_ERR((_T("[WAV:ERR] FillOutputBuffer() : Exception ccurs [%d]\n\r"), GetExceptionCode()));
    }

    return BytesTransferred;
}


ULONG
HardwareContext::TransferInputBuffers(DWORD dwStatus)
{
    ULONG BytesTransferred=0;

    dwStatus &= (DMA_DONEA|DMA_DONEB|DMA_BIU);

    WAV_MSG((_T("[WAV] TransferInputBuffers(0x%08x)\n\r"), dwStatus));

    switch (dwStatus)
    {
    case 0:
    case DMA_BIU:
        // No done bits set- must not be my interrupt
        return 0;
    case DMA_DONEA|DMA_DONEB|DMA_BIU:
        // Load B, then A
        BytesTransferred = FillInputBuffer(INPUT_DMA_BUFFER1);
        // fall through
    case DMA_DONEA: // This should never happen!
    case DMA_DONEA|DMA_BIU:
        // Load A
        BytesTransferred += FillInputBuffer(INPUT_DMA_BUFFER0);
        break;
    case DMA_DONEA|DMA_DONEB:
        // Load A, then B
        BytesTransferred = FillInputBuffer(INPUT_DMA_BUFFER0);
        BytesTransferred += FillInputBuffer(INPUT_DMA_BUFFER1);
        break;
    case DMA_DONEB|DMA_BIU: // This should never happen!
    case DMA_DONEB:
        // Load B
        BytesTransferred += FillInputBuffer(INPUT_DMA_BUFFER1);
        break;
    }

    // If it was our interrupt, but we weren't able to transfer any bytes
    // (e.g. no empty buffers ready to be filled)
    // Then stop the input DMA
    if (BytesTransferred==0)
    {
        StopInputDMA();
    }
    else
    {
        StartInputDMA();        // for DMA resume when wake up
    }

    return BytesTransferred;
}


ULONG
HardwareContext::FillInputBuffer(int nBufferNumber)
{
    ULONG BytesTransferred = 0;

    PBYTE pBufferStart = m_InputDMABufferVirPage[nBufferNumber];
    PBYTE pBufferEnd = pBufferStart + AUDIO_DMA_PAGE_SIZE;
    PBYTE pBufferLast;

    WAV_MSG((_T("[WAV] FillInputBuffer(%d)\n\r"), nBufferNumber));

    __try
    {
        pBufferLast = m_InputDeviceContext.TransferBuffer(pBufferStart, pBufferEnd, NULL);
        BytesTransferred = m_nInByte[nBufferNumber] = pBufferLast-pBufferStart;

        if(nBufferNumber == INPUT_DMA_BUFFER0)            // Input Buffer A
        {
            m_InputDMAStatus &= ~DMA_DONEA;
            m_InputDMAStatus |= DMA_STRTA;
        }
        else                                                // Input Buffer B
        {
            m_InputDMAStatus &= ~DMA_DONEB;
            m_InputDMAStatus |= DMA_STRTB;
        }

    }
    __except(GetExceptionCode()==STATUS_ACCESS_VIOLATION ?
            EXCEPTION_EXECUTE_HANDLER : EXCEPTION_CONTINUE_SEARCH)
    {
        WAV_ERR((_T("[WAV:ERR] FillInputBuffer() : Exception ccurs [%d]\n\r"), GetExceptionCode()));
    }

    return BytesTransferred;
}


void
HardwareContext::WriteCodecRegister(UCHAR Reg, USHORT Val)
{
    // WM8580
    // SFR[B15..B9], DATA[B8..B0]
    // +------------------------+
    // | B15...B9 B8.........B0 |
    // +------------------------+
    //
    UCHAR command0, command1;

    m_WM8580_SFR_Table[Reg] = Val;

    WAV_MSG((_T("[WAV] WriteCodecRegister(0x%02x, 0x%x)\n\r"), Reg, Val));

    command0 = (UCHAR)(Reg<<1)|(UCHAR)((Val>>8)&1);
    command1 = (UCHAR)(Val&0xFF);

    HW_WriteRegisters((PUCHAR)&command1, command0, 1);
}


DWORD
HardwareContext::WriteCodecRegister2(UCHAR Reg, USHORT Val)
{
    DWORD nReturned=0, bytes=0;
    BOOL  bRet = FALSE;

    UCHAR buff[2];
    IIC_IO_DESC IIC_Data;

    // WM8580
    // SFR[B15..B9], DATA[B8..B0]
    // +------------------------+
    // | B15...B9 B8.........B0 |
    // +------------------------+
    //
    UCHAR command0, command1;

    m_WM8580_SFR_Table[Reg] = Val;

    WAV_MSG((_T("[WAV] WriteCodecRegister2(0x%02x, 0x%x)\n\r"), Reg, Val));

    buff[0] = command0 = (UCHAR)(Reg<<1)|(UCHAR)((Val>>8)&1);
    buff[1] = command1 = (UCHAR)(Val&0xFF);

    IIC_Data.SlaveAddress = CHIP_ID;
    IIC_Data.Data = buff;
    IIC_Data.Count = 2;

    bRet = DeviceIoControl(m_hI2C,
                        IOCTL_IIC_WRITE,
                        &IIC_Data, sizeof(IIC_IO_DESC),
                        NULL, 0,
                        &bytes, NULL);

    if (bRet == 0)
    {
        DEBUGMSG(ZONE_ERROR, (TEXT("[HWCTXT] ERROR: Device I/O Control Request FAIL, 0x%08X\r\n"), GetLastError()));
        nReturned = -1;
    }

    WAV_MSG((_T("[WAV] WriteCodecRegister2()-\n\r")));

    return nReturned;
}


USHORT
HardwareContext::ReadCodecRegister(UCHAR Reg)
{
    USHORT RegValue = 0;

    //-----------------------------------------------------------------------------------------------------
    // !!!!! Caution !!!!!
    // WM8580 support write operation only.
    // I write sfr data value onto internal table(m_WM8580_SFR_Table), on every write operation for backup.
    // And To support read operation, I just return some value from internal table(m_WM8580_SFR_Table).
    //-----------------------------------------------------------------------------------------------------

    RegValue = m_WM8580_SFR_Table[(int)Reg];

    WAV_MSG((_T("[WAV] ReadCodecRegister(0x%02x) = 0x%03x\n\r"), Reg, RegValue));

    return (USHORT)RegValue;
}


BOOL
HardwareContext::CodecPowerControl()
{

    if( m_bInputDMARunning & m_bOutputDMARunning )
    {
        WAV_MSG((_T("[WAV] CodecPowerControl() : CodecPowerControl() ADC & DAC On\n\r")));
        WriteCodecRegister(WM8580_PWRDN1, WM8580_ALL_POWER_ON);                    // ADC, DAC power up
    }
    else if( m_bInputDMARunning )
    {
        WAV_MSG((_T("[WAV] CodecPowerControl() : CodecPowerControl() ADC On\n\r")));
        WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_ADCPD_ENABLE|WM8580_PWRDN1_DACPD_ALL_DISABLE);        // ADC power up, DAC power down
    }
    else if( m_bOutputDMARunning )
    {
        WAV_MSG((_T("[WAV] CodecPowerControl() : CodecPowerControl() DAC On\n\r")));
        WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_DACPD_ALL_ENABLE|WM8580_PWRDN1_ADCPD_DISABLE);   // DAC power up, ADC power down    
    }
    else
    {
        WAV_MSG((_T("[WAV] CodecPowerControl() : CodecPowerControl() ADC & DAC Off\n\r")));
        WriteCodecRegister(WM8580_PWRDN1, WM8580_PWRDN1_ADCPD_DISABLE|WM8580_PWRDN1_DACPD_ALL_DISABLE ); // ADC/DAC power down
    }

    return(TRUE);
}


BOOL
HardwareContext::CodecMuteControl(DWORD channel, BOOL bMute)
{

    if(channel & DMA_CH_OUT)
    {
        if(bMute)
        {
            WriteCodecRegister(WM8580_DAC_CONTROL5, 0x010);
        }
        else
        {
            WriteCodecRegister(WM8580_DAC_CONTROL5, 0x000);
        }
    }
    if(channel & DMA_CH_IN) 
    {
        if(bMute)
        {
            WriteCodecRegister(WM8580_ADC_CONTROL1, 0x044);
        }
        else
        {
            WriteCodecRegister(WM8580_ADC_CONTROL1, 0x040);
        }
    }

    return(TRUE);
}


void HardwareContext::SetSpeakerEnable(BOOL bEnable)
{
    // Code to turn speaker on/off here
    return;
}


void CallInterruptThreadOutputDMA(HardwareContext *pHWContext)
{
    pHWContext->InterruptThreadOutputDMA();
}


void CallInterruptThreadInputDMA(HardwareContext *pHWContext)
{
    pHWContext->InterruptThreadInputDMA();
}


// Write WM8580 IIS Codec registers directly from our cache
DWORD HardwareContext::HW_WriteRegisters(
    PUCHAR pBuff,       // Optional buffer
    UCHAR StartReg,     // start register
    DWORD nRegs         // number of registers
    )
{
    DWORD dwErr=0,bytes;
    UCHAR buff[2];
    IIC_IO_DESC IIC_Data;


    buff[0] = StartReg;
    buff[1] = pBuff[0];

    IIC_Data.SlaveAddress = WM8580_WRITE;
    
    IIC_Data.Data = buff;
    IIC_Data.Count = 2;

    WAV_MSG((_T("[WAV] HW_WriteRegisters()\r\n")));

    // use iocontrol to write
    if ( !DeviceIoControl(m_hI2C,
                        IOCTL_IIC_WRITE,
                        &IIC_Data, sizeof(IIC_IO_DESC),
                        NULL, 0,
                        &bytes, NULL) )
    {
        dwErr = GetLastError();
    }

    if ( dwErr )
    {
        WAV_ERR((_T("[WAV::ERR]I2CWrite ERROR: %u \r\n"), dwErr));
    }

    return dwErr;
}


DWORD HardwareContext::HW_ReadRegisters(
    PUCHAR pBuff,       // Optional buffer
    UCHAR StartReg,     // start register
    DWORD nRegs         // number of registers
    )
{
    DWORD dwErr=0;
    DWORD bytes;
    IIC_IO_DESC IIC_AddressData, IIC_Data;

    IIC_AddressData.SlaveAddress = WM8580_READ;
    
    IIC_AddressData.Data = &StartReg;
    IIC_AddressData.Count = 1;

    IIC_Data.SlaveAddress = WM8580_READ;
    
    IIC_Data.Data = pBuff;
    IIC_Data.Count = 1;

    WAV_MSG((_T("[WAV] HW_ReadRegisters()\r\n")));

    // use iocontrol to read
    if ( !DeviceIoControl(m_hI2C,
                        IOCTL_IIC_READ,
                        &IIC_AddressData, sizeof(IIC_IO_DESC),
                        &IIC_Data, sizeof(IIC_IO_DESC),
                        &bytes, NULL) )
    {
        dwErr = GetLastError();
    }

    if ( dwErr )
    {
        WAV_ERR((_T("[WAV::ERR]I2CRead ERROR: %u \r\n"), dwErr));
    }

    return dwErr;
}


void HardwareContext::I2S_Init8580Driver()
{
    int i;

    WAV_MSG((_T("[WAV] +I2S_Init8580Driver()\n\r")));

    // Initialize WM8580_SFR_Table data
    for (i=0; i<WM8580_MAX_REGISTER_COUNT; i++)
    {
        m_WM8580_SFR_Table[i] = 0;
    }

    // Default setting value
    for(i=0; i<(sizeof(WM8580_Codec_Init_Table)/sizeof(unsigned int)/2); i++)
    {
        WriteCodecRegister(WM8580_Codec_Init_Table[i][0], WM8580_Codec_Init_Table[i][1]);
    }
}