?? logo.lst
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CYASM Version 2.02
(C) 1998,1999,2000,2001,2002,2003 Cypress Semiconductor Corp.
;******************************************************
;
; file: 637xx USB logo firmware
; Date: 02/16/2000
; Description: This code draw the USB logo using
; a mouse cursor on your monitor. Turn
; on mouse trails to see the logo.
; Target: Cypress CY7C63743
;
;
; Overview: There is only one task handled by this
; firmware, and that is USB.
;
; USB
; At bus reset the USB interface is re-initialized,
; and the firmware soft reboots. We are then able to
; handle the standard chapter nine requests on
; endpoint zero (the control endpoint). After this
; device enumerates as a HID mouse on the USB, the
; requests come to endpoint one (the data endpoint).
; Endpoint one is used to send mouse displacement and
; button status information. In this case we don't
; send any button information, just the displacement
; information to make it appear as though we are moving
; the mouse in a pattern drawing out the letters
; U-S-B. In order to see this, it is best to turn on
; the mouse cursor trails if you are running MS Windows.
;
; Pin Connections
;
; -------------------
; | P0[0] P0[4] |
; | P0[1] P0[5] |
; | P0[2] P0[6] |
; | P0[3] P0[7] |
; | P1[0] P1[1] |
; | P1[2] P1[3] |
; | P1[4] P1[5] |
; | P1[6] P1[7] |
; GND | VSS D+/SCLK | USB D+ / PS2 SCLK
; GND | VPP D-/SDATA| USB D- / PS2 SDATA
; PULLUP | VREG VCC | +5
; | XTALIN XTALOUT |
; -------------------
;
; Revisions:
; 2-16-2000 SEA Creation
;
;**********************************************************
;
; Copyright 2000 Cypress Semiconductor
; This code is provided by Cypress as a reference. Cypress
; makes no claims or warranties to this firmware's
; suitability for any application.
;
;**********************************************************
;**************** assembler directives *****************
0000 CPU 63723
0000 XPAGEON
; processor registers
0000= port0: equ 00h
0001= port1: equ 01h
0002= port2: equ 02h
0004= port0_int: equ 04h
0005= port1_int: equ 05h
0006= port0_int_polarity: equ 06h
0007= port1_int_polarity: equ 07h
000A= port0_mode0: equ 0Ah
000B= port0_mode1: equ 0Bh
000C= port1_mode0: equ 0Ch
000D= port1_mode1: equ 0Dh
0010= usb_address: equ 10h
0011= ep0_count: equ 11h
0012= ep0_mode: equ 12h
0013= ep1_count: equ 13h
0014= ep1_mode: equ 14h
0015= ep2_count: equ 15h
0016= ep2_mode: equ 16h
001F= usb_status: equ 1Fh
0020= global_int: equ 20h
0021= endpoint_int: equ 21h
0024= timer_lsb: equ 24h
0025= timer_msb: equ 25h
0026= watchdog: equ 26h
0040= capturea_rising: equ 40h
0041= capturea_falling: equ 41h
0042= captureb_rising: equ 42h
0043= captureb_falling: equ 43h
0044= capture_config: equ 44h
0045= capture_status: equ 45h
0060= spi_data: equ 60h
0061= spi_control: equ 61h
00F8= clock_config: equ F8h
00FF= control: equ FFh
; Port 2 Data Register 0x02 bit assignments
0020= SCLK: equ 20h
0020= DPLUS: equ 20h
0010= SDATA: equ 10h
0010= DMINUS: equ 10h
0002= XTALIN: equ 02h
0001= VREG: equ 01h
; USB Port status and control register 0x1F bit assignments
0080= PS2_PULLUP: equ 80h
0040= VREG_ENABLE: equ 40h
0020= USB_PS2_MODE: equ 20h
0008= BUS_ACTIVITY: equ 08h
0004= CONTROL2: equ 04h
0002= CONTROL1: equ 02h
0001= CONTROL0: equ 01h
0000= NOT_FORCING: equ 00h
0001= FORCE_K: equ 01h
0002= FORCE_J: equ 02h
0003= FORCE_SE0: equ 03h
0040= FORCEBOTH_LOW: equ 40h
0005= FORCESDATA_LOW: equ 05h
0006= FORCESCLK_LOW: equ 06h
0007= FORCE_HIZ: equ 07h
; USB Device Address Registers 0x10 bit assignments
0080= ADDRESS_ENABLE: equ 80h
007F= ADDRESS_MASK: equ 7Fh
; USB Device EP0 Mode Register 0x12
0080= EP0_SETUP: equ 80h
0040= EP0_IN: equ 40h
0020= EP0_OUT: equ 20h
0010= EP0_ACK: equ 10h
000F= MODE_MASK: equ 0Fh
; USB Device Endpoint Mode Registers 0x14, 0x16
0080= EP_STALL: equ 80h
0010= EP_ACK: equ 10h
; USB Device Counter Registers 0x11, 0x13, 0x15
0080= DATA_TOGGLE: equ 80h
0040= DATA_VALID: equ 40h
000F= BYTE_COUNT: equ 0Fh
;Capture Timers Configuration Register 0x44
0080= FIRST_EDGE_HOLD: equ 80h
0070= PRESCALE: equ 70h
0040= PRESCALE2: equ 40h
0020= PRESCALE1: equ 20h
0010= PRESCALE0: equ 10h
0008= CAPTUREB_FALL_INT: equ 08h
0004= CAPTUREB_RISE_INT: equ 04h
0002= CAPTUREA_FALL_INT: equ 02h
0001= CAPTUREA_RISE_INT: equ 01h
;Capture Timers Status Register 0x45
0008= CAPTUREB_FALL_EVENT: equ 08h
0004= CAPTUREB_RISE_EVENT: equ 04h
0002= CAPTUREA_FALL_EVENT: equ 02h
0001= CAPTUREA_RISE_EVENT: equ 01h
;Processor Status and Control Register 0xFF
0080= IRQ_PENDING: equ 80h
0040= WDR: equ 40h
0020= USB_RESET: equ 20h
0010= POR_RESET: equ 10h
0008= SUSPEND: equ 08h
0004= INT_ENABLE_SENSE: equ 04h
0001= RUN: equ 01h
; global interrupt enable register 0x20 bit assignments
0080= WAKEUP_INT: equ 80h
0040= GPIO_INT: equ 40h
0020= CAPTUREB_INT: equ 20h
0010= CAPTUREA_INT: equ 10h
0008= SPI_INT: equ 08h
0004= 1MS_INT: equ 04h
0002= 128US_INT: equ 02h
0001= USB_RESET_INT: equ 01h
; USB Endpoint Interrupt Enable Register 0x21 bit assignments
0004= EP2_INT: equ 04h
0002= EP1_INT: equ 02h
0001= EP0_INT: equ 01h
; SPI Control Register 0x61 bit assignments
0080= TCMP: equ 80h
0040= TBF: equ 40h
0020= MODE1: equ 20h
0010= MODE0: equ 10h
0008= CPOL: equ 08h
0004= CPHA: equ 04h
0002= SCK_SELECT1: equ 02h
0001= SCK_SELECT0: equ 01h
; Clock Configuration Register 0xF8 bit assignments
0080= EXT_DELAY: equ 80h
0040= WAKEUP_ADJUST2: equ 40h
0020= WAKEUP_ADJUST1: equ 20h
0010= WAKEUP_ADJUST0: equ 10h
0008= LVR_ENABLE: equ 08h
0002= INTERNAL_CLK: equ 02h
0001= EXTERNAL_CLK: equ 01h
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