/* PWM header file for pwm audio driver.
 * It's based on MCF5272.
 * 2003/6/18 floatingg(??)
 */

#ifndef _PWM_AUDIO_H_
#define _PWM_AUDIO_H_

#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
#define WORD_REF(addr) (*((volatile unsigned short*)addr))
#define LONG_REF(addr) (*((volatile unsigned long*)addr))

#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK)
#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT)

/*
 * System Control Register (SCR)
 */
#define MCF_MBAR        0x10000000



#define PWM_IRQ_NUM	69     /*timer0 interrupt num*/

/*
 * PWM Control Register 
 */
#define PWCR0		0x00c0  /*PWM Control Register 0 [31-24] */
#define PWCR1		0x00c4
#define PWCR2		0x00c8

#define PWWD0		0x00d0  /*PWM Pulse Width Register 0 [31-24] */
#define PWWD1		0x00d4
#define PWWD2		0x00d8


#define PWWD_ADDR	MCF_MBAR + PWWD0
#define PWMC_ADDR	MCF_MBAR + PWCR0
#define PWMC		BYTE_REF(PWMC_ADDR)
		
#define PWMC_CLKSEL_MASK	0x03	/* Clock Selection [3:0],divider of system clock,sysclk/2^n,33k*/
#define PWMC_EN			0x80	/* Enable PWM */
#define PWMC_FRC1		0x00
#define PWMC_LVL		0x00
#define PWMC_PWMEN		PWMC_EN
#define PWMC_RESET		PWMC_EN |PWMC_CLKSEL_MASK |PWMC_LVL |PWMC_FRC1
#define PWMC_INIT		PWMC_RESET
#endif