?? csio.h
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/************************************************************************/
/* */
/* MODULE: csio.h */
/* DATE: 12/7/2000 */
/* PURPOSE: Crystal Semiconductor CS8900 driver for pSOS/Trimedia */
/* PROGRAMMER: fangpeng */
/* */
/*----------------------------------------------------------------------*/
/* */
/* Copyright 2000, fangpeng. */
/* ALL RIGHTS RESERVED */
/* */
/************************************************************************/
#ifndef _CSIO_H
#define _CSIO_H
#include "sys_conf.h"
#include "mybsp.h"
#include "cs8900a.h"
#include <tm1\tmXIO.h>
#include "errno.h"
#include <stdio.h>
#include <psos.h>
#include <tmlib/tmtypes.h>
#include <assert.h>
#include <sys/stat.h>
#include <stdarg.h>
#include <stdlib.h>
#include <tmlib/dprintf.h>
#if defined(__cplusplus)
extern "C" {
#endif
/* some functions to r/w Cs8900A_XIO */
/* *********had defined the followings **********/
/* BSP_CS8900_IO_BASE 0x0300 Base address of IO ports */
/* BSP_CS8900_MEM_BASE 0x01000 Base address of PacketPage */
/*--------------------------- macros in tmxio.h---------------------------------------*/
/* #define xioRead(xio_addr) \
((*((unsigned long *)((xioGetCTL_ADDRESS << XIO_CTL_ADDRESS_SHIFT) + (xio_addr) * 4))) >> 24)
#define xioWrite(xio_addr, value) \
(*((unsigned long *)((xioGetCTL_ADDRESS << XIO_CTL_ADDRESS_SHIFT) + (xio_addr) * 4))) = (((value) << 24) + 0x00ffffff)
*/
/* usage */
/* enable the xio address.*/
/* MMIO(XIO_CTL) = 0x5800079f; 0B 0101,1000,0000,0000,0000,0111,1001,1111
bit31-26=0101,10 : +low_24bit+xx is specific XIO device memory space
bit25-11 :unused
bit10-8=111 : wait 7 clocks
bit7 =1 :XIO Bus enabled
bit6-5 : unused
bit4-0 =1,1111 :f=4.16MHZ if internal HIGH bus=133MHZ
then access address in these space by defining all 32-bit PCI address in these space
or by xioRead(xio_addr) and xio_addr(xio_addr,value) MACRO */
#define myxioRead(xio_addr) \
((*((volatile unsigned long *)(0x58000000 + (xio_addr) * 4))) >> 24)
#define myxioWrite(xio_addr, value) \
(*((volatile unsigned long *)(0x58000000 + (xio_addr) * 4))) = (((value) << 24) + 0x00ffffff)
/* ALL xio DEVICE in 0x58000000 */
#define CS_PCI_BASE 0x58800000
#define CS_XIO_BASE 0x200000
/*RomA20 =0 ->Read; =1 -> Write */
/*A23=A22=0,A21=1->chipsel# */
/* ROMA0 =0 ->16bit cs8900a R/W, =1 ->8bit R/W EPLD data regisers */
/* ROMA12=0 ->IO ,=1 MEM */
#define CS_XIO_Write_IO_BASE 0x300300 /*A20=1,A12=0 */
#define CS_XIO_Read_IO_BASE 0x200300 /*A20=0,A12=0 */
#define CS_XIO_Write_MEM_BASE 0x301000 /*A20=1,A12=1 */
#define CS_XIO_Read_MEM_BASE 0x201000 /*A20=0,A12=1 */
/*define for cs8900a */
/* Because Macro will cause argument parameters ,
so I use functions instead of macros */
/* #define inb(cs_addr) xioRead(cs_addr+CS_XIO_8_IO_BASE)
#define outb(cs_addr,value) xioWrite(cs_addr+CS_XIO_8_IO_BASE,value)
#define inw(cs_addr) \
((xioRead(cs_addr+CS_XIO_16_IO_BASE))+(xioRead(cs_addr+CS_XIO_16_IO_BASE))<<8)
#define outw(cs_addr,value) {\
xioWrite(cs_addr+CS_XIO_16_IO_BASE,value>>8);\
xioWrite(cs_addr+CS_XIO_16_IO_BASE,value);\
}
#define inMEMb(cs_addr) xioRead(cs_addr+CS_XIO_8_MEM_BASE)
#define outMEMb(cs_addr,value) xioWrite(cs_addr+CS_XIO_8_MEM_BASE,value)
#define inMEMw(cs_addr) \
((xioRead(cs_addr+CS_XIO_16_MEM_BASE))+(xioRead(cs_addr+CS_XIO_16_MEM_BASE))<<8)
#define outMEMw(cs_addr,value) {\
xioWrite(cs_addr+CS_XIO_16_MEM_BASE,value>>8);\
xioWrite(cs_addr+CS_XIO_16_MEM_BASE,value);\
}
*/
unsigned char inb(unsigned long PortAddr);
unsigned short inw(unsigned long PortAddr);
void outw(unsigned long PortAddr,unsigned short value);
unsigned short inMEMw(unsigned short *MemAddr);
void outMEMw(unsigned short *MemAddr,unsigned short value);
unsigned char inMEMb(unsigned short *MemAddr);
void outMEMb(unsigned short *MemAddr,unsigned short value);
#if defined(__cplusplus)
}
#endif
#endif /* _CSIO_H */
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