add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave3_regfile/memory
add wave -noupdate -divider -height 30 {Perpherials on PLD Bus 2}
add wave -noupdate -divider {Master 0 Stripe-to-PLD Bridge(Master Port) [On PLD Bus 2]}
add wave -noupdate -format Logic /ahb_bus_tb/dut/embedded_stripe/masterhclk
add wave -noupdate -format Logic /ahb_bus_tb/dut/embedded_stripe/masterhbusreq
add wave -noupdate -format Logic /ahb_bus_tb/dut/embedded_stripe/masterhgrant
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/embedded_stripe/masterhaddr
add wave -noupdate -format Literal /ahb_bus_tb/dut/embedded_stripe/masterhtrans
add wave -noupdate -format Literal /ahb_bus_tb/dut/embedded_stripe/masterhsize
add wave -noupdate -format Literal /ahb_bus_tb/dut/embedded_stripe/masterhburst
add wave -noupdate -format Logic /ahb_bus_tb/dut/embedded_stripe/masterhwrite
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/embedded_stripe/masterhwdata
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/embedded_stripe/masterhrdata
add wave -noupdate -format Literal /ahb_bus_tb/dut/embedded_stripe/masterhresp
add wave -noupdate -format Logic /ahb_bus_tb/dut/embedded_stripe/masterhready
add wave -noupdate -divider {Master 1 Single  Read Transaction [On PLD Bus 2]}
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/HCLK
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/start_trans
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/HBUSREQ
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/HGRANT
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master1_single_read/HADDR
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master1_single_read/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master1_single_read/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master1_single_read/HBURST
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master1_single_read/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master1_single_read/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master1_single_read/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/HREADY
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master1_single_read/bus_error
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master1_single_read/machine_state
add wave -noupdate -divider {Master 2 ALU Driver [On PLD Bus 2]}
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/HCLK
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/start_trans
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/HBUSREQ
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/HGRANT
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master2_alu/HADDR
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master2_alu/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master2_alu/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master2_alu/HBURST
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master2_alu/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/Master2_alu/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master2_alu/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/Master2_alu/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/Master2_alu/machine_state
add wave -noupdate -format Literal -radix unsigned /ahb_bus_tb/dut/Master2_alu/beat_count
add wave -noupdate -divider {Slave 7 Single Transaction (On PLD Bus 2)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave7/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave7/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave7/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave7/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave7/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave7/HBURST
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave7/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave7/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave7/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave7/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave7/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave7/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave7_regfile/memory
add wave -noupdate -divider {Slave 8 Burst Transcation Slave (On PLD Bus 2)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave8/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave8/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave8/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave8/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave8/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave8/HBURST
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave8/HWDATA
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave8/HWRITE
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave8/HREADY_in
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave8/HRESP
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave8/HRDATA
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave8/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave8/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave8_regfile/memory
add wave -noupdate -divider {Slave 9 Wide Slave (On PLD Bus 2)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/wide_slave9/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/wide_slave9/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/wide_slave9/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/wide_slave9/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/wide_slave9/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/wide_slave9/HBURST
add wave -noupdate -format Logic /ahb_bus_tb/dut/wide_slave9/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/wide_slave9/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/wide_slave9/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/wide_slave9/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/wide_slave9/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/wide_slave9/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave9one_regfile/memory
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave9tow_regfile/memory
add wave -noupdate -divider -height 30 {Slaves on Interconnect Matrix}
add wave -noupdate -divider {Slave 4 Single Transaction (On Interconnect Matrix)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave4/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave4/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave4/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave4/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave4/HSIZE
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave4/HBURST
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave4/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave4/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/single_transaction_slave4/HRDATA
add wave -noupdate -format Literal -radix binary /ahb_bus_tb/dut/single_transaction_slave4/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/single_transaction_slave4/HREADY
add wave -noupdate -format Literal /ahb_bus_tb/dut/single_transaction_slave4/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave4_regfile/memory
add wave -noupdate -divider {Slave 5 ALU (On Interconnect Matrix)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/alu_slave5/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/alu_slave5/HBURST
add wave -noupdate -format Literal /ahb_bus_tb/dut/alu_slave5/HSIZE
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/alu_slave5/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/HREADY
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/HREADY_in
add wave -noupdate -format Logic /ahb_bus_tb/dut/alu_slave5/b2v_Control_Unit/latch_bus
add wave -noupdate -format Literal /ahb_bus_tb/dut/alu_slave5/b2v_Control_Unit/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/b2v_Register_File/operand1
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/b2v_Register_File/operand2
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/b2v_Register_File/operation
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/b2v_Register_File/result_low
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/alu_slave5/b2v_Register_File/result_high
add wave -noupdate -divider {Slave 6 Burst Transcation (On Interconnect Matrix)}
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave6/HCLOCK
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave6/HSEL
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave6/HADDRESS
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave6/HTRANS
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave6/HBURST
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave6/HSIZE
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave6/HWRITE
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave6/HWDATA
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/burst_slave6/HRDATA
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave6/HRESP
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave6/HREADY
add wave -noupdate -format Logic /ahb_bus_tb/dut/burst_slave6/HREADY_in
add wave -noupdate -format Literal /ahb_bus_tb/dut/burst_slave6/slave_state
add wave -noupdate -format Literal -radix hexadecimal /ahb_bus_tb/dut/slave6_regfile/memory
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {16793200 ps}
WaveRestoreZoom {16214974 ps} {17001278 ps}
configure wave -namecolwidth 656
configure wave -valuecolwidth 68
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0