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VERSION 6
BEGIN SCHEMATIC
BEGIN ATTR DeviceFamilyName "xc9500xl"
DELETE all:0
EDITNAME all:0
EDITTRAIT all:0
END ATTR
BEGIN NETLIST
SIGNAL RST
SIGNAL WR
SIGNAL DOUT(7:0)
SIGNAL CS0
SIGNAL CS1
SIGNAL CS2
SIGNAL DIN(7:0)
SIGNAL RD
SIGNAL INTRX
SIGNAL INTTX
SIGNAL DOEN_UART
SIGNAL CS3
SIGNAL CS4
SIGNAL DOUT(0)
SIGNAL DOUT(1)
SIGNAL CLK16X
SIGNAL DATA(7:0)
SIGNAL XLXN_25
SIGNAL XLXN_303
SIGNAL RXD
SIGNAL TXD
SIGNAL XLXN_618(7:0)
SIGNAL ADDR(7:0)
SIGNAL ADDR(2)
SIGNAL ADDR(1)
SIGNAL ADDR(0)
SIGNAL CS5
SIGNAL CS6
SIGNAL CS7
SIGNAL ADDR(7)
SIGNAL TINT
SIGNAL MINT0
SIGNAL MINT1
SIGNAL ENA0
SIGNAL ENA1
SIGNAL XLXN_833
SIGNAL XLXN_836
SIGNAL XLXN_762
SIGNAL XLXN_768
SIGNAL DIN(0)
SIGNAL DIN(1)
SIGNAL BAUD(15:8)
SIGNAL BAUD(7:0)
SIGNAL BAUD(15:0)
SIGNAL XLXN_849
SIGNAL XLXN_850
SIGNAL MCLK
PORT Input RST
PORT Input WR
PORT Input RD
PORT BiDirectional DATA(7:0)
PORT Input RXD
PORT Output TXD
PORT Input ADDR(7:0)
PORT Output TINT
PORT Input MCLK
BEGIN BLOCKDEF inv
TIMESTAMP 2001 3 9 11 23 50
LINE N 0 -32 64 -32
LINE N 224 -32 160 -32
LINE N 64 -64 128 -32
LINE N 128 -32 64 0
LINE N 64 0 64 -64
CIRCLE N 128 -48 160 -16
END BLOCKDEF
BEGIN BLOCKDEF ibuf8
TIMESTAMP 2001 3 9 11 23 23
RECTANGLE N 128 -44 224 -20
LINE N 224 -32 128 -32
RECTANGLE N 0 -44 64 -20
LINE N 64 0 64 -64
LINE N 128 -32 64 0
LINE N 64 -64 128 -32
LINE N 0 -32 64 -32
END BLOCKDEF
BEGIN BLOCKDEF obufe8
TIMESTAMP 2001 3 9 11 23 23
LINE N 0 -96 64 -96
LINE N 0 -32 64 -32
LINE N 224 -32 128 -32
RECTANGLE N 0 -44 64 -20
RECTANGLE N 128 -44 224 -20
LINE N 96 -96 64 -96
LINE N 96 -48 96 -96
LINE N 64 -64 64 0
LINE N 128 -32 64 -64
LINE N 64 0 128 -32
END BLOCKDEF
BEGIN BLOCKDEF buft8
TIMESTAMP 2001 3 9 11 21 49
RECTANGLE N 128 -44 224 -20
LINE N 0 -32 64 -32
LINE N 64 -64 64 0
LINE N 128 -32 64 -64
LINE N 64 0 128 -32
RECTANGLE N 0 -44 64 -20
LINE N 224 -32 128 -32
LINE N 96 -96 64 -96
LINE N 96 -48 96 -96
LINE N 0 -96 64 -96
END BLOCKDEF
BEGIN BLOCKDEF or3
TIMESTAMP 2001 3 9 11 23 50
LINE N 0 -64 48 -64
LINE N 0 -128 72 -128
LINE N 0 -192 48 -192
LINE N 256 -128 192 -128
ARC N 28 -256 204 -80 112 -80 192 -128
ARC N -40 -184 72 -72 48 -80 48 -176
LINE N 48 -64 48 -80
LINE N 48 -192 48 -176
LINE N 112 -80 48 -80
ARC N 28 -176 204 0 192 -128 112 -176
LINE N 112 -176 48 -176
END BLOCKDEF
BEGIN BLOCKDEF and2b1
TIMESTAMP 2001 5 11 10 41 49
LINE N 64 -48 64 -144
LINE N 64 -144 144 -144
LINE N 144 -48 64 -48
ARC N 96 -144 192 -48 144 -48 144 -144
LINE N 256 -96 192 -96
LINE N 0 -128 64 -128
LINE N 0 -64 40 -64
CIRCLE N 40 -76 64 -52
END BLOCKDEF
BEGIN BLOCKDEF and2
TIMESTAMP 2001 5 11 10 41 37
LINE N 0 -64 64 -64
LINE N 0 -128 64 -128
LINE N 256 -96 192 -96
ARC N 96 -144 192 -48 144 -48 144 -144
LINE N 144 -48 64 -48
LINE N 64 -144 144 -144
LINE N 64 -48 64 -144
END BLOCKDEF
BEGIN BLOCKDEF uart
TIMESTAMP 2006 10 19 12 49 7
RECTANGLE N 64 -512 320 0
LINE N 64 -480 0 -480
LINE N 64 -416 0 -416
LINE N 64 -352 0 -352
LINE N 64 -288 0 -288
LINE N 64 -224 0 -224
LINE N 64 -160 0 -160
RECTANGLE N 0 -108 64 -84
LINE N 64 -96 0 -96
LINE N 320 -480 384 -480
LINE N 320 -416 384 -416
LINE N 320 -352 384 -352
LINE N 320 -288 384 -288
LINE N 320 -224 384 -224
LINE N 320 -160 384 -160
LINE N 320 -96 384 -96
RECTANGLE N 320 -44 384 -20
LINE N 320 -32 384 -32
END BLOCKDEF
BEGIN BLOCKDEF nor2
TIMESTAMP 2001 3 9 11 23 50
LINE N 0 -64 64 -64
LINE N 0 -128 64 -128
LINE N 256 -96 216 -96
CIRCLE N 192 -108 216 -84
ARC N 28 -224 204 -48 112 -48 192 -96
ARC N 28 -144 204 32 192 -96 112 -144
ARC N -40 -152 72 -40 48 -48 48 -144
LINE N 112 -48 48 -48
LINE N 112 -144 48 -144
END BLOCKDEF
BEGIN BLOCKDEF fdce
TIMESTAMP 2001 3 9 11 23 0
LINE N 0 -128 64 -128
LINE N 0 -192 64 -192
LINE N 0 -32 64 -32
LINE N 0 -256 64 -256
LINE N 384 -256 320 -256
LINE N 64 -112 80 -128
LINE N 80 -128 64 -144
LINE N 192 -64 192 -32
LINE N 192 -32 64 -32
RECTANGLE N 64 -320 320 -64
END BLOCKDEF
BEGIN BLOCKDEF buft
TIMESTAMP 2001 3 9 11 21 49
LINE N 64 -64 64 0
LINE N 128 -32 64 -64
LINE N 64 0 128 -32
LINE N 96 -96 64 -96
LINE N 96 -48 96 -96
LINE N 0 -96 64 -96
LINE N 224 -32 128 -32
LINE N 0 -32 64 -32
END BLOCKDEF
BEGIN BLOCKDEF d3_8e
TIMESTAMP 2001 3 9 11 22 33
LINE N 0 -576 64 -576
LINE N 0 -512 64 -512
LINE N 0 -448 64 -448
LINE N 384 -576 320 -576
LINE N 384 -512 320 -512
LINE N 384 -448 320 -448
LINE N 384 -384 320 -384
LINE N 384 -320 320 -320
LINE N 384 -256 320 -256
LINE N 384 -192 320 -192
LINE N 384 -128 320 -128
RECTANGLE N 64 -640 320 -64
LINE N 0 -128 64 -128
END BLOCKDEF
BEGIN BLOCKDEF cb16cle
TIMESTAMP 2001 5 11 10 47 0
LINE N 384 -384 320 -384
RECTANGLE N 320 -396 384 -372
RECTANGLE N 0 -396 64 -372
LINE N 80 -128 64 -144
LINE N 64 -112 80 -128
LINE N 192 -32 64 -32
LINE N 192 -64 192 -32
RECTANGLE N 64 -448 320 -64
LINE N 384 -192 320 -192
LINE N 384 -128 320 -128
LINE N 0 -384 64 -384
LINE N 0 -256 64 -256
LINE N 0 -32 64 -32
LINE N 0 -128 64 -128
LINE N 0 -192 64 -192
END BLOCKDEF
BEGIN BLOCKDEF vcc
TIMESTAMP 2001 3 9 11 23 11
LINE N 96 -64 32 -64
LINE N 64 0 64 -32
LINE N 64 -32 64 -64
END BLOCKDEF
BEGIN BLOCKDEF fd8ce
TIMESTAMP 2001 3 9 11 23 0
LINE N 0 -128 64 -128
LINE N 0 -192 64 -192
LINE N 0 -32 64 -32
LINE N 0 -256 64 -256
LINE N 384 -256 320 -256
LINE N 192 -32 64 -32
LINE N 192 -64 192 -32
LINE N 80 -128 64 -144
LINE N 64 -112 80 -128
RECTANGLE N 320 -268 384 -244
RECTANGLE N 0 -268 64 -244
RECTANGLE N 64 -320 320 -64
END BLOCKDEF
BEGIN BLOCK XLXI_6 obufe8
PIN E XLXN_25
PIN I(7:0) DOUT(7:0)
PIN O(7:0) DATA(7:0)
END BLOCK
BEGIN BLOCK XLXI_107 and2b1
PIN I0 RD
PIN I1 XLXN_303
PIN O XLXN_25
END BLOCK
BEGIN BLOCK XLXI_106 or3
PIN I0 DOEN_UART
PIN I1 CS1
PIN I2 CS2
PIN O XLXN_303
END BLOCK
BEGIN BLOCK XLXI_5 ibuf8
PIN I(7:0) DATA(7:0)
PIN O(7:0) DIN(7:0)
END BLOCK
BEGIN BLOCK XLXI_213 uart
PIN rst RST
PIN clk16x CLK16X
PIN rxd RXD
PIN rdn RD
PIN wrn WR
PIN csn CS0
PIN din(7:0) DIN(7:0)
PIN data_ready INTRX
PIN parity_error
PIN framing_error
PIN tdempty INTTX
PIN tsre
PIN sdo TXD
PIN ndo_en DOEN_UART
PIN dout(7:0) XLXN_618(7:0)
END BLOCK
BEGIN BLOCK XLXI_214 buft8
PIN I(7:0) XLXN_618(7:0)
PIN T DOEN_UART
PIN O(7:0) DOUT(7:0)
END BLOCK
BEGIN BLOCK XLXI_290 d3_8e
PIN A0 ADDR(0)
PIN A1 ADDR(1)
PIN A2 ADDR(2)
PIN E ADDR(7)
PIN D0 CS0
PIN D1 CS1
PIN D2 CS2
PIN D3 CS3
PIN D4 CS4
PIN D5 CS5
PIN D6 CS6
PIN D7 CS7
END BLOCK
BEGIN BLOCK XLXI_237 nor2
PIN I0 MINT1
PIN I1 MINT0
PIN O TINT
END BLOCK
BEGIN BLOCK XLXI_286 buft
PIN I MINT0
PIN T XLXN_833
PIN O DOUT(0)
END BLOCK
BEGIN BLOCK XLXI_287 inv
PIN I CS2
PIN O XLXN_833
END BLOCK
BEGIN BLOCK XLXI_288 buft
PIN I MINT1
PIN T XLXN_836
PIN O DOUT(1)
END BLOCK
BEGIN BLOCK XLXI_289 inv
PIN I CS2
PIN O XLXN_836
END BLOCK
BEGIN BLOCK XLXI_256 buft
PIN I ENA0
PIN T XLXN_762
PIN O DOUT(0)
END BLOCK
BEGIN BLOCK XLXI_258 inv
PIN I CS1
PIN O XLXN_762
END BLOCK
BEGIN BLOCK XLXI_262 buft
PIN I ENA1
PIN T XLXN_768
PIN O DOUT(1)
END BLOCK
BEGIN BLOCK XLXI_263 inv
PIN I CS1
PIN O XLXN_768
END BLOCK
BEGIN BLOCK XLXI_245 fdce
PIN C WR
PIN CE CS1
PIN CLR RST
PIN D DIN(0)
PIN Q ENA0
END BLOCK
BEGIN BLOCK XLXI_248 fdce
PIN C WR
PIN CE CS1
PIN CLR RST
PIN D DIN(1)
PIN Q ENA1
END BLOCK
BEGIN BLOCK XLXI_185 and2
PIN I0 ENA0
PIN I1 INTTX
PIN O MINT0
END BLOCK
BEGIN BLOCK XLXI_186 and2
PIN I0 ENA1
PIN I1 INTRX
PIN O MINT1
END BLOCK
BEGIN BLOCK XLXI_297 cb16cle
PIN C MCLK
PIN CE XLXN_849
PIN CLR RST
PIN D(15:0) BAUD(15:0)
PIN L XLXN_850
PIN CEO XLXN_850
PIN Q(15:0)
PIN TC CLK16X
END BLOCK
BEGIN BLOCK XLXI_302 vcc
PIN P XLXN_849
END BLOCK
BEGIN BLOCK XLXI_351 fd8ce
PIN C WR
PIN CE CS4
PIN CLR RST
PIN D(7:0) DIN(7:0)
PIN Q(7:0) BAUD(7:0)
END BLOCK
BEGIN BLOCK XLXI_352 fd8ce
PIN C WR
PIN CE CS3
PIN CLR RST
PIN D(7:0) DIN(7:0)
PIN Q(7:0) BAUD(15:8)
END BLOCK
END NETLIST
BEGIN SHEET 1 7040 5440
BEGIN BRANCH DATA(7:0)
WIRE 496 3136 528 3136
WIRE 528 3136 528 3440
WIRE 528 3440 608 3440
WIRE 528 3136 720 3136
END BRANCH
INSTANCE XLXI_6 832 3472 M0
BEGIN BRANCH DOUT(7:0)
WIRE 832 3440 912 3440
BEGIN DISPLAY 912 3440 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
BEGIN BRANCH XLXN_25
WIRE 832 3376 848 3376
WIRE 848 3376 976 3376
END BRANCH
INSTANCE XLXI_107 1232 3280 R180
BEGIN BRANCH DOEN_UART
WIRE 1584 3344 1632 3344
BEGIN DISPLAY 1632 3344 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
BEGIN BRANCH CS1
WIRE 1584 3408 1632 3408
BEGIN DISPLAY 1632 3408 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
BEGIN BRANCH CS2
WIRE 1584 3472 1632 3472
BEGIN DISPLAY 1632 3472 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
INSTANCE XLXI_106 1584 3280 R180
BEGIN BRANCH RD
WIRE 1232 3344 1312 3344
BEGIN DISPLAY 1312 3344 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
BEGIN BRANCH XLXN_303
WIRE 1232 3408 1248 3408
WIRE 1248 3408 1328 3408
END BRANCH
BEGIN BRANCH DIN(7:0)
WIRE 944 3136 992 3136
BEGIN DISPLAY 992 3136 ATTR Name
ALIGNMENT SOFT-LEFT
END DISPLAY
END BRANCH
INSTANCE XLXI_5 720 3168 R0
IOMARKER 496 3136 DATA(7:0) R180 28
BEGIN BRANCH DIN(7:0)
WIRE 2816 4464 2896 4464
BEGIN DISPLAY 2816 4464 ATTR Name
ALIGNMENT SOFT-RIGHT
END DISPLAY
END BRANCH
BEGIN BRANCH CS0
WIRE 2816 4400 2896 4400
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