?? init860.s
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#########################################################################
#
# FILENAME: INIT860.S
#
# DESCRIPTION:
#
# This file contains the initialization software that is first executed.
# It initializes or defines the operation for the following areas:
#
# - Defines the vector interrupt table and establishes where it will
# reside in the memory map.
#
# - Dcache (Data Cache) and Icache (Instruction Cache).
#
# - MMU (Memory Management Unit)
#
# - SIU (System Interface Unit)
#
# - Memory Controller and UPM Table
#
# - Defines Internal Memory Map (IMMR)
#
# - Clock and Reset Circuitry
#
# - External Bus Interface
#
# - User's Program Stack
#
# This file also contains an interrupt handler template called "handler" for
# processing PowerPC exceptions.
#
# NOTES:
#
# (1) This startup was assembled using the Diab Data Compiler.
#
# (2) We are not using simplified mnemonics in this example. When the user
# has determined that the assembler chosen supports a simplified
# mnemonic set, then the user is free to change mnemonics for clarity's
# sake. Refer to PowerPC Microprocessor Family: The Programming
# Environments for 32-Bit Microprocessors book for details on these
# instructions. The simplified mnemonic set for assemblers that support
# them are listed in appendix F of this manual.
#
# (3) R0 is used exclusively as a means for transferring immediate data. It
# will always have the value of 0.
#
# (4) R4 is used exclusively to contain the IMMR base address.
#
# (5) R1 is used exclusively as the stack pointer.
#
#
# REFERENCES:
#
# 1. MPC860 PowerQUICC User's Manual
# 2. PowerPC Microprocessor Family: The Programming Environments for 32-Bit
# Microprocessors
#
# HISTORY:
#
# jay 4/22/98 Initial Release
# jay 6/9/98 Fixed a bug in the flush_cache function. See the function
# header for details.
# jay 9/2/98 There were bugs in the interrupt handling code. LR was
# getting wasted and the interrupt couldn't return to the
# the place where the interrupt happended. There were also
# a couple of other registers that were being hammered. I
# added interrupt vectors for other possible interrupts.
#
#########################################################################
#----------------------
# Assembler directives
#----------------------
.text
.align 2
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#
# Exception Vector Table. Note: This is the starting point for code
# mapping. Note that "handler" is called in some of the vectors. This
# interrupt function has been created in template form as a starting
# point for the user. It is defined further down in this module.
#
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
VectorTable:
#~~~~~~~~~~~~~~~~~~~~~~
# 0100: SYSTEM RESET
#~~~~~~~~~~~~~~~~~~~~~~
.skip 0x0100-(.-VectorTable)
Xreset:
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r2,0,_start@h
ori r2,r2,_start@l
mtspr LR,r2
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
#~~~~~~~~~~~~~~~~~~~~~~
# 0200: MACHINE CHECK
#~~~~~~~~~~~~~~~~~~~~~~
.skip 0x0200-(.-VectorTable)
__Xmchk:
#--------------------------------------------
# save off registers used in vector routine
#--------------------------------------------
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#-------------------------------------#
# FLUSH AND INVALIDATE THE CACHES #
#-------------------------------------#
mfspr r3,srr0 # get the faulting instruction address
icbi 0,r3 # invalidate the cache block
mfspr r3,19 # get the faulting data from DAR -> r2
dcbi 0,r3 # invalidate the data cache block
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0200
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
#~~~~~~~~~~~~~~~~~~~~~~~~~
# 0300: DATA ACCESS ERROR
#~~~~~~~~~~~~~~~~~~~~~~~~~
# never generated by the MPC8xx
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# 0400:INSTRUCTION ACCESS ERROR
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# never generated by the MPC8xx
#~~~~~~~~~~~~~~~~~~~~~~~~~~
# 0500: EXTERNAL INTERRUPT
#~~~~~~~~~~~~~~~~~~~~~~~~~~
#-------------------------------------------#
# save off registers used in vector routine #
#-------------------------------------------#
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0500
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
#~~~~~~~~~~~~~~~~~~~~~~
# 0600: ALIGNMENT ERROR
#~~~~~~~~~~~~~~~~~~~~~~
.skip 0x0600-(.-VectorTable)
__Xalgn:
#-------------------------------------------#
# save off registers used in vector routine #
#-------------------------------------------#
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0600
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
#~~~~~~~~~~~~~~~~~~~~~~
# 0700: PROGRAM ERROR
#~~~~~~~~~~~~~~~~~~~~~~
.skip 0x0700-(.-VectorTable)
__Xprog:
#-------------------------------------------#
# save off registers used in vector routine #
#-------------------------------------------#
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0700
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# 0800: FLOATING-POINT UNAVAILABLE
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# never generated by the MPC8xx
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
# 0900: DECREMENTER INTERRUPT
#~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.skip 0x0900-(.-VectorTable)
__Xdec:
#-------------------------------------------#
# save off registers used in vector routine #
#-------------------------------------------#
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0900
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
#~~~~~~~~~~~~~~~
# 0A00: RESERVED
#~~~~~~~~~~~~~~~
#~~~~~~~~~~~~~~~
# 0B00: RESERVED
#~~~~~~~~~~~~~~~
#~~~~~~~~~~~~~~~~~~~
# 0C00: SYSTEM CALL
#~~~~~~~~~~~~~~~~~~~
.skip 0x0C00-(.-VectorTable)
__Xsysc:
#-------------------------------------------#
# save off registers used in vector routine #
#-------------------------------------------#
mtspr SPRG3,r3 # save r3
mfspr r3,LR
mtspr SPRG2,r3 # save LR
#---------------------------------------------------
# Load the vector offset value in SPRG0 for handler
#---------------------------------------------------
addi r3,r0,0x0C00
mtspr SPRG0,r3
#---------------------------------------------------------
# load link register in order to jump to physical address
#---------------------------------------------------------
addis r3,0,handler@h
ori r3,r3,handler@l
mtspr LR,r3
bclr 20,0 # jump unconditionally to address in Link
# Register (LR)
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