Loading snapshot worklib.oc8051_tb:v .................... Donencsim> source /shared/tools/ncsim/tools/inca/files/ncsimrcncsim> runWarning!  some objects excluded from $dumpvars due to -access -R            File: /projects/oc8051/simont/oc8051/bench/verilog/oc8051_tb.v, line = 161, pos = 16           Scope: oc8051_tb            Time: 0 FS + 0time                    1 step           0: passtime                 6636 step           1: passtime                 6826 step           2: passtime                 7016 step           3: passtime                 7206 step           4: passtime                 7396 faulire: mismatch on ports in step           5 p0_out 03 p1_out 08 p2_out ff testvecp 01xxxx p_out   0308ffSimulation complete via $finish(1) at time 7418 NS + 0/projects/oc8051/simont/oc8051/bench/verilog/oc8051_tb.v:146     $finish;ncsim> exit