?? base.src
字號:
; .\base.SRC generated from: base.c
; COMPILER INVOKED BY:
; C:\Keil\C51\BIN\C51.EXE base.c BROWSE DEBUG OBJECTEXTEND SRC(.\base.SRC)
$NOMOD51
NAME BASE
CCF2 BIT 0D8H.2
TB80 BIT 098H.3
SPI0CKR DATA 09DH
CCF3 BIT 0D8H.3
P0 DATA 080H
SPIEN BIT 0F8H.0
CCF4 BIT 0D8H.4
SM00 BIT 098H.7
P1 DATA 090H
AA BIT 0C0H.2
SM10 BIT 098H.6
WDTCN DATA 0FFH
P2 DATA 0A0H
SM20 BIT 098H.5
ADC0CF DATA 0BCH
P3 DATA 0B0H
AC BIT 0D0H.6
ADC1CF DATA 0ABH
P4 DATA 084H
EIE1 DATA 0E6H
P5 DATA 085H
EA BIT 0A8H.7
EIE2 DATA 0E7H
P6 DATA 086H
P7 DATA 096H
PSCTL DATA 08FH
LASTS BIT 090H.4
MSTEN BIT 0F8H.1
CF BIT 0D8H.7
ADC0CN DATA 0E8H
DAC0CN DATA 0D4H
DAC1CN DATA 0D7H
ADC1CN DATA 0AAH
P0MDOUT DATA 0A4H
P1MDOUT DATA 0A5H
IE DATA 0A8H
P2MDOUT DATA 0A6H
P3MDOUT DATA 0A7H
TMR3RLH DATA 093H
START BIT 080H.5
EIP1 DATA 0F6H
EIP2 DATA 0F7H
BACK BIT 080H.4
PCA0CPH0 DATA 0FAH
PCA0CPH1 DATA 0FBH
P3IF DATA 0ADH
TMR3RLL DATA 092H
PCA0CPH2 DATA 0FCH
CR BIT 0D8H.6
PCA0CPH3 DATA 0FDH
EXF2 BIT 0C8H.6
REN0 BIT 098H.4
PCA0CPH4 DATA 0FEH
PCA0CPL0 DATA 0EAH
EMI0CF DATA 0A3H
PCA0CPL1 DATA 0EBH
PCA0CPM0 DATA 0DAH
PCA0MD DATA 0D9H
PCA0CN DATA 0D8H
PCA0CPL2 DATA 0ECH
PCA0CPM1 DATA 0DBH
PCA0CPL3 DATA 0EDH
PCA0CPM2 DATA 0DCH
IP DATA 0B8H
PCA0CPL4 DATA 0EEH
PCA0CPM3 DATA 0DDH
PCA0CPM4 DATA 0DEH
TXBSY BIT 0F8H.3
CY BIT 0D0H.7
SI BIT 0C0H.3
LEDG BIT 0B0H.4
XBR0 DATA 0E1H
SADEN0 DATA 0B9H
XBR1 DATA 0E2H
EMI0CN DATA 0AFH
SADEN1 DATA 0AEH
XBR2 DATA 0E3H
REF0CN DATA 0D1H
SADDR0 DATA 0A9H
SADDR1 DATA 0F3H
AMX0CF DATA 0BAH
AD0INT BIT 0E8H.5
RCAP2H DATA 0CBH
PS BIT 0B8H.4
SP DATA 081H
RCAP4H DATA 0E5H
EMI0TC DATA 0A1H
OV BIT 0D0H.2
SMB0CN DATA 0C0H
RCAP2L DATA 0CAH
CH452_DCLK BIT 0A0H.4
MODF BIT 0F8H.5
RCAP4L DATA 0E4H
CH452_LOAD BIT 0A0H.6
SMB0CR DATA 0CFH
CPT0CN DATA 09EH
P1MDIN DATA 0BDH
CPT1CN DATA 09FH
SPI0CN DATA 0F8H
PCON DATA 087H
SPIF BIT 0F8H.7
P74OUT DATA 0B5H
TMOD DATA 089H
TCON DATA 088H
WCOL BIT 0F8H.6
AMX0SL DATA 0BBH
AMX1SL DATA 0ACH
TMR3CN DATA 091H
IE0 BIT 088H.1
IE1 BIT 088H.3
B DATA 0F0H
DAC0H DATA 0D3H
ADC0H DATA 0BFH
OSCICN DATA 0B2H
DAC1H DATA 0D6H
SMBFTE BIT 0C0H.1
BUSY BIT 0C0H.7
CH452_DOUT BIT 0B0H.7
DAC0L DATA 0D2H
ADC0L DATA 0BEH
DAC1L DATA 0D5H
IN0 BIT 090H.1
ACC DATA 0E0H
IN1 BIT 090H.3
ES0 BIT 0A8H.4
IN2 BIT 090H.0
AD0EN BIT 0E8H.7
CT2 BIT 0C8H.1
ET0 BIT 0A8H.1
ET1 BIT 0A8H.3
TF0 BIT 088H.5
ET2 BIT 0A8H.5
RI0 BIT 098H.0
TF1 BIT 088H.7
IN5 BIT 090H.2
TF2 BIT 0C8H.7
SMBTOE BIT 0C0H.0
TH0 DATA 08CH
IN6 BIT 090H.6
EX0 BIT 0A8H.0
TI0 BIT 098H.1
IT0 BIT 088H.0
PCA0H DATA 0F9H
TH1 DATA 08DH
EX1 BIT 0A8H.2
IT1 BIT 088H.2
TH2 DATA 0CDH
P BIT 0D0H.0
TH4 DATA 0F5H
OSCXCN DATA 0B1H
TL0 DATA 08AH
PCA0L DATA 0E9H
TL1 DATA 08BH
TL2 DATA 0CCH
PT0 BIT 0B8H.1
TL4 DATA 0F4H
RS0 BIT 0D0H.3
PT1 BIT 0B8H.3
SPOKER BIT 080H.6
RS1 BIT 0D0H.4
PT2 BIT 0B8H.5
TR0 BIT 088H.4
AD0TM BIT 0E8H.6
TR1 BIT 088H.6
TR2 BIT 0C8H.2
PX0 BIT 0B8H.0
PX1 BIT 0B8H.2
SLVSEL BIT 0F8H.2
DPH DATA 083H
RCLK0 BIT 0C8H.5
ADC0GTH DATA 0C5H
TCLK0 BIT 0C8H.4
DPL DATA 082H
ADC0GTL DATA 0C4H
SBUF0 DATA 099H
SBUF1 DATA 0F2H
ADC0LTH DATA 0C7H
CH452_DIN BIT 0A0H.7
EXEN2 BIT 0C8H.3
RSTSRC DATA 0EFH
FLACL DATA 0B7H
CPRL2 BIT 0C8H.0
SCON0 DATA 098H
SCON1 DATA 0F1H
ADC0LTL DATA 0C6H
T2CON DATA 0C8H
STA BIT 0C0H.5
T4CON DATA 0C9H
SMB0ADR DATA 0C3H
SMB0DAT DATA 0C2H
SPI0CFG DATA 09AH
TMR3H DATA 095H
CKCON DATA 08EH
RXOVRN BIT 0F8H.4
TMR3L DATA 094H
AD0LJST BIT 0E8H.0
F0 BIT 0D0H.5
FLSCL DATA 0B6H
AD0CM0 BIT 0E8H.2
F1 BIT 0D0H.1
STO BIT 0C0H.4
ENSMB BIT 0C0H.6
LASTB BIT 090H.5
AD0CM1 BIT 0E8H.3
SPI0DAT DATA 09BH
AD0WINT BIT 0E8H.1
ADC1 DATA 09CH
AD0BUSY BIT 0E8H.4
PSW DATA 0D0H
CCF0 BIT 0D8H.0
RB80 BIT 098H.2
SMB0STA DATA 0C1H
CCF1 BIT 0D8H.1
?PR?Port_IO_Init?BASE SEGMENT CODE
?PR?Interrupts_Init?BASE SEGMENT CODE
?PR?Init_Device?BASE SEGMENT CODE
?PR?_speedchange?BASE SEGMENT CODE
?DT?_speedchange?BASE SEGMENT DATA OVERLAYABLE
?PR?pingjun?BASE SEGMENT CODE
?DT?pingjun?BASE SEGMENT DATA OVERLAYABLE
?PR?stage_clk_start?BASE SEGMENT CODE
?PR?_delay_s?BASE SEGMENT CODE
?PR?_judgement?BASE SEGMENT CODE
?DT?_judgement?BASE SEGMENT DATA OVERLAYABLE
?PR?_judgementback?BASE SEGMENT CODE
?DT?_judgementback?BASE SEGMENT DATA OVERLAYABLE
?PR?main?BASE SEGMENT CODE
?DT?main?BASE SEGMENT DATA OVERLAYABLE
?PR?PCA_ISR?BASE SEGMENT CODE
?PR?led?BASE SEGMENT CODE
?DT?led?BASE SEGMENT DATA OVERLAYABLE
?PR?T0_ISR?BASE SEGMENT CODE
?PR?TIMER1_ISR?BASE SEGMENT CODE
?DT?TIMER1_ISR?BASE SEGMENT DATA OVERLAYABLE
?C_INITSEG SEGMENT CODE
?DT?BASE SEGMENT DATA
?XD?BASE SEGMENT XDATA
EXTRN CODE (CH452_Read)
EXTRN CODE (_abs)
EXTRN CODE (Oscillator_Init)
EXTRN CODE (CH452_Init)
EXTRN CODE (ADC_Init)
EXTRN CODE (Voltage_Reference_Init)
EXTRN CODE (Reset_Sources_Init)
EXTRN CODE (PCA_Init)
EXTRN CODE (_delayms)
EXTRN CODE (_CH452_Write)
EXTRN CODE (Timer_Init)
EXTRN CODE (AD_IN)
EXTRN CODE (_BCD_H_L)
EXTRN CODE (?C?FCASTI)
EXTRN CODE (?C?FPMUL)
EXTRN CODE (?C?CASTF)
EXTRN CODE (?C?LSTXDATA)
EXTRN CODE (?C?ULDIV)
EXTRN CODE (?C_STARTUP)
EXTRN CODE (?C?ULCMP)
PUBLIC forward
PUBLIC T0_OF
PUBLIC xianshi
PUBLIC g
PUBLIC f
PUBLIC e
PUBLIC time2
PUBLIC d
PUBLIC time1
PUBLIC c?
PUBLIC a?
PUBLIC avge0
PUBLIC data0
PUBLIC min
PUBLIC bb
PUBLIC backward
PUBLIC sec
PUBLIC counter2
PUBLIC counter1
PUBLIC stage_sec
PUBLIC stage_clk_flag
PUBLIC left
PUBLIC avge
PUBLIC right
PUBLIC keykey
PUBLIC black
PUBLIC TIMER1_ISR
PUBLIC T0_ISR
PUBLIC led
PUBLIC PCA_ISR
PUBLIC main
PUBLIC _judgementback
PUBLIC _judgement
PUBLIC _delay_s
PUBLIC stage_clk_start
PUBLIC pingjun
PUBLIC _speedchange
PUBLIC Init_Device
PUBLIC Interrupts_Init
PUBLIC Port_IO_Init
RSEG ?DT?pingjun?BASE
?pingjun?BYTE:
avgad1?443: DS 4
ORG 4
avgad?444: DS 4
ORG 8
state?445: DS 4
RSEG ?DT?TIMER1_ISR?BASE
?TIMER1_ISR?BYTE:
i?1360: DS 1
RSEG ?DT?main?BASE
?main?BYTE:
chazhi?956: DS 1
RSEG ?DT?_judgement?BASE
?_judgement?BYTE:
modi?749: DS 1
ORG 1
modi1?750: DS 1
ORG 2
dem?751: DS 1
ORG 3
i?752: DS 1
RSEG ?DT?led?BASE
?led?BYTE:
key?1158: DS 1
ORG 1
t?1159: DS 1
RSEG ?DT?_judgementback?BASE
?_judgementback?BYTE:
modi?853: DS 1
ORG 1
modi1?854: DS 1
ORG 2
dem?855: DS 1
RSEG ?DT?_speedchange?BASE
?_speedchange?BYTE:
duty?340: DS 1
ORG 1
i?341: DS 1
RSEG ?DT?BASE
black: DS 1
keykey: DS 1
right: DS 1
avge: DS 4
left: DS 1
stage_clk_flag: DS 1
stage_sec: DS 1
counter1: DS 1
counter2: DS 1
sec: DS 1
backward: DS 1
bb: DS 1
min: DS 1
avge0: DS 4
a?: DS 1
c?: DS 1
time1: DS 1
d: DS 1
time2: DS 1
e: DS 1
f: DS 1
g: DS 1
xianshi: DS 1
T0_OF: DS 1
forward: DS 1
RSEG ?XD?BASE
data0: DS 60
RSEG ?C_INITSEG
DB 004H
DB avge
DB 000H,000H,000H,000H ; long
DB 004H
DB avge0
DB 000H,000H,000H,000H ; long
DB 001H
DB time1
DB 000H
DB 001H
DB time2
DB 000H
DB 001H
DB counter1
DB 000H
DB 001H
DB counter2
DB 000H
DB 001H
DB forward
DB 000H
DB 001H
DB black
DB 000H
DB 001H
DB keykey
DB 000H
DB 001H
DB backward
DB 000H
DB 001H
DB xianshi
DB 001H
DB 001H
DB T0_OF
DB 000H
DB 001H
DB min
DB 000H
DB 001H
DB sec
DB 000H
DB 001H
DB stage_sec
DB 000H
DB 001H
DB stage_clk_flag
DB 000H
; /////////////////////////////////////
; // COPYRIGHT RERVERED BY BUANDXIA //
; /////////////////////////////////////
;
; #include "c8051F020.h"
; #include "intrins.h"
; #include "CH452CMD.H" // 定義常用命令碼及外部子程序
; #include "pin.h"
; #include "math.h"
; #include "key_display.h"
;
;
; //定義端口
; sbit LEDG = P3^4;
; sbit BACK = P0^4;
; sbit START = P0^5;
; sbit SPOKER = P0^6;
; sbit IN0 = P1^1;//左
; sbit IN1 = P1^3;//中
; sbit IN2 = P1^0;//右
; //sbit IN3 = P1^5;//斜右
; //sbit IN4 = P1^2;//斜左
; sbit IN5 = P1^2;//正面左
; sbit IN6 = P1^6;//正面右
; sbit LASTS = P1^4;
; sbit LASTB = P1^5;
;
; //定義全局變量
; ulong xdata data0[15];
; ulong avge=0,avge0=0;
; uchar time1=0,time2=0,counter1=0,counter2=0;
; uchar a,bb,c,d,e,f,g,right,left;
; uchar forward=0,black=0,keykey=0,backward=0,xianshi=1;
; uchar T0_OF=0,min=0,sec=0; //T0_OF時T0溢出次數(shù) ,t_n=0
; uchar stage_sec=0,stage_clk_flag=0; //stage_clk_flag為1是階段計時標(biāo)志位.不用stage_min
; // Peripheral specific initialization functions,
; // Called from the Init_Device() function
;
;
; void Port_IO_Init()
RSEG ?PR?Port_IO_Init?BASE
Port_IO_Init:
; SOURCE LINE # 40
; {
; SOURCE LINE # 41
; // P0.0 - CEX0 (PCA), Open-Drain, Digital
; // P0.1 - CEX1 (PCA), Open-Drain, Digital
; XBR0 = 0x10; /*CEX0-->P0.0,CEX1-->P0.1*/
; SOURCE LINE # 44
MOV XBR0,#010H
; XBR2 = 0x40;
; SOURCE LINE # 45
MOV XBR2,#040H
; }
; SOURCE LINE # 46
RET
; END OF Port_IO_Init
;
; void Interrupts_Init()
RSEG ?PR?Interrupts_Init?BASE
Interrupts_Init:
; SOURCE LINE # 48
; {
; SOURCE LINE # 49
;
; IE = 0x0A; //使能定時器1中斷//使能定時器0中斷
; SOURCE LINE # 51
MOV IE,#0AH
; IP = 0x02; //使定時器1,0優(yōu)先級高
; SOURCE LINE # 52
MOV IP,#02H
; EIE1 = 0x08; //使能PCA0中斷
; SOURCE LINE # 53
MOV EIE1,#08H
; EIE2 = 0x20; //使能外部鍵盤中斷
; SOURCE LINE # 54
MOV EIE2,#020H
; EIP2 = 0x20; //使外部鍵盤優(yōu)先級高
; SOURCE LINE # 55
MOV EIP2,#020H
;
; }
; SOURCE LINE # 57
RET
; END OF Interrupts_Init
;
; // Initialization function for device,
; // Call Init_Device() from your main program
; void Init_Device(void)
RSEG ?PR?Init_Device?BASE
Init_Device:
USING 0
; SOURCE LINE # 61
; {
; SOURCE LINE # 62
; Reset_Sources_Init();
; SOURCE LINE # 63
LCALL Reset_Sources_Init
; ADC_Init();
; SOURCE LINE # 64
LCALL ADC_Init
; PCA_Init();
; SOURCE LINE # 65
LCALL PCA_Init
; Timer_Init();
; SOURCE LINE # 66
LCALL Timer_Init
; Oscillator_Init();
; SOURCE LINE # 67
LCALL Oscillator_Init
; Voltage_Reference_Init();
; SOURCE LINE # 68
LCALL Voltage_Reference_Init
; Port_IO_Init();
; SOURCE LINE # 69
LCALL Port_IO_Init
; Interrupts_Init();
; SOURCE LINE # 70
LJMP Interrupts_Init
; END OF Init_Device
; }
; void speedchange(uchar duty,uchar i)
RSEG ?PR?_speedchange?BASE
_speedchange:
USING 0
; SOURCE LINE # 72
MOV duty?340,R7
MOV i?341,R5
; {
; SOURCE LINE # 73
; if(i==0) PCA0CPH0 =(uchar)((100-duty)*2.56); //把duty值轉(zhuǎn)換，賦值給控制占空比的寄存器
; SOURCE LINE # 74
MOV A,i?341
JNZ ?C0004
CLR C
MOV A,#064H
SUBB A,R7
MOV R5,A
CLR A
SUBB A,#00H
MOV R4,A
CLR A
LCALL ?C?FCASTI
MOV R3,#0AH
MOV R2,#0D7H
MOV R1,#023H
MOV R0,#040H
LCALL ?C?FPMUL
LCALL ?C?CASTF
MOV PCA0CPH0,R7
?C0004:
; if(i==1) PCA0CPH1=(uchar)((100-duty)*2.56);
; SOURCE LINE # 75
MOV A,i?341
CJNE A,#01H,?C0006
CLR C
MOV A,#064H
SUBB A,duty?340
MOV R5,A
CLR A
SUBB A,#00H
MOV R4,A
CLR A
LCALL ?C?FCASTI
MOV R3,#0AH
MOV R2,#0D7H
MOV R1,#023H
MOV R0,#040H
LCALL ?C?FPMUL
LCALL ?C?CASTF
MOV PCA0CPH1,R7
; }
; SOURCE LINE # 76
?C0006:
RET
; END OF _speedchange
; ulong pingjun (void)
RSEG ?PR?pingjun?BASE
pingjun:
USING 0
; SOURCE LINE # 77
; { uchar i;
; SOURCE LINE # 78
; ulong avgad1=0,avgad=0,state=0;
; SOURCE LINE # 79
CLR A
MOV avgad1?443+03H,A
MOV avgad1?443+02H,A
MOV avgad1?443+01H,A
MOV avgad1?443,A
MOV avgad?444+03H,A
MOV avgad?444+02H,A
MOV avgad?444+01H,A
MOV avgad?444,A
MOV state?445+03H,A
MOV state?445+02H,A
MOV state?445+01H,A
MOV state?445,A
; state=AD_IN();
; SOURCE LINE # 80
LCALL AD_IN
LCALL ?C?CASTF
MOV state?445+03H,R7
MOV state?445+02H,R6
MOV state?445+01H,R5
MOV state?445,R4
; for(i=0;i<15;i++)
; SOURCE LINE # 81
;---- Variable 'i?442' assigned to Register 'R3' ----
CLR A
MOV R3,A
?C0007:
; {
; SOURCE LINE # 82
; data0[i]=state;
; SOURCE LINE # 83
MOV R7,state?445+03H
MOV R6,state?445+02H
MOV R5,state?445+01H
MOV R4,state?445
MOV A,R3
ADD A,ACC
ADD A,ACC
ADD A,#LOW (data0)
MOV DPL,A
CLR A
ADDC A,#HIGH (data0)
MOV DPH,A
LCALL ?C?LSTXDATA
; SOURCE LINE # 84
MOV A,R3
ADD A,ACC
ADD A,ACC
ADD A,#LOW (data0)
MOV DPL,A
CLR A
ADDC A,#HIGH (data0)
MOV DPH,A
MOVX A,@DPTR
MOV R4,A
INC DPTR
MOVX A,@DPTR
MOV R5,A
INC DPTR
MOVX A,@DPTR
MOV R6,A
INC DPTR
MOVX A,@DPTR
ADD A,avgad?444+03H
MOV avgad?444+03H,A
MOV A,R6
ADDC A,avgad?444+02H
MOV avgad?444+02H,A
MOV A,R5
ADDC A,avgad?444+01H
MOV avgad?444+01H,A
MOV A,R4
ADDC A,avgad?444
MOV avgad?444,A
; }
; SOURCE LINE # 85
INC R3
CJNE R3,#0FH,?C0007
?C0008:
; avgad=avgad/15;
; SOURCE LINE # 86
MOV R7,avgad?444+03H
MOV R6,avgad?444+02H
MOV R5,avgad?444+01H
MOV R4,avgad?444
CLR A
MOV R3,#0FH
MOV R2,A
MOV R1,A
MOV R0,A
LCALL ?C?ULDIV
MOV avgad?444+03H,R7
MOV avgad?444+02H,R6
MOV avgad?444+01H,R5
MOV avgad?444,R4
; for(i=0;i<15;i++)
; SOURCE LINE # 87
CLR A
MOV R3,A
?C0010:
; {
; SOURCE LINE # 88
; data0[i]=state;
; SOURCE LINE # 89
MOV R7,state?445+03H
MOV R6,state?445+02H
MOV R5,state?445+01H
MOV R4,state?445
MOV A,R3
ADD A,ACC
ADD A,ACC
ADD A,#LOW (data0)
MOV DPL,A
CLR A
ADDC A,#HIGH (data0)
MOV DPH,A
LCALL ?C?LSTXDATA
; avgad1+=data0[i];
; SOURCE LINE # 90
MOV A,R3
ADD A,ACC
ADD A,ACC
ADD A,#LOW (data0)
MOV DPL,A
CLR A
ADDC A,#HIGH (data0)
MOV DPH,A
MOVX A,@DPTR
MOV R4,A
INC DPTR
MOVX A,@DPTR
MOV R5,A
INC DPTR
MOVX A,@DPTR
MOV R6,A
INC DPTR
MOVX A,@DPTR
ADD A,avgad1?443+03H
MOV avgad1?443+03H,A
MOV A,R6
ADDC A,avgad1?443+02H
MOV avgad1?443+02H,A
MOV A,R5
ADDC A,avgad1?443+01H
MOV avgad1?443+01H,A
MOV A,R4
ADDC A,avgad1?443
MOV avgad1?443,A
; }
; SOURCE LINE # 91
INC R3
CJNE R3,#0FH,?C0010
?C0011:
; avgad1=avgad1/15;
; SOURCE LINE # 92
MOV R7,avgad1?443+03H
MOV R6,avgad1?443+02H
MOV R5,avgad1?443+01H
MOV R4,avgad1?443
CLR A
MOV R3,#0FH
MOV R2,A
MOV R1,A
MOV R0,A
LCALL ?C?ULDIV
MOV avgad1?443+03H,R7
MOV avgad1?443+02H,R6
MOV avgad1?443+01H,R5
MOV avgad1?443,R4
; avge=(avgad+avgad1)/4;
; SOURCE LINE # 93
MOV A,avgad?444+03H
ADD A,avgad1?443+03H
MOV R7,A
MOV A,avgad?444+02H
ADDC A,avgad1?443+02H
MOV R6,A
MOV A,avgad?444+01H
ADDC A,avgad1?443+01H
MOV R5,A
MOV A,avgad?444
ADDC A,avgad1?443
MOV R4,A
CLR A
MOV R3,#04H
MOV R2,A
MOV R1,A
MOV R0,A
LCALL ?C?ULDIV
MOV avge+03H,R7
MOV avge+02H,R6
MOV avge+01H,R5
MOV avge,R4
; return(avge);
; SOURCE LINE # 94
; }
; SOURCE LINE # 95
?C0013:
RET
; END OF pingjun
; void stage_clk_start()
RSEG ?PR?stage_clk_start?BASE
stage_clk_start:
USING 0
; SOURCE LINE # 96
; {
; SOURCE LINE # 97
; CH452_Write(CH452_TWINKLE);
; SOURCE LINE # 98
MOV R7,#00H
MOV R6,#06H
LCALL _CH452_Write
; DELAY_1US;DELAY_1US;DELAY_1US;DELAY_1US;DELAY_1US;
; SOURCE LINE # 99
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
; stage_clk_flag=1;
; SOURCE LINE # 100
MOV stage_clk_flag,#01H
; stage_sec=0;
; SOURCE LINE # 101
CLR A
MOV stage_sec,A
; CH452_Write(CH452_DIG4);
; SOURCE LINE # 102
MOV R7,A
MOV R6,#0CH
LCALL _CH452_Write
; CH452_Write(CH452_DIG5 | 16);
; SOURCE LINE # 103
MOV R7,#010H
MOV R6,#0DH
LJMP _CH452_Write
; END OF stage_clk_start
; }
; /****精確秒延時****/
; void delay_s(uchar n)
?? 快捷鍵說明
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F11
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減小字號
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