This document gives a brief description of the known hardware features of theSNES giving you some idea what SNES emulation authors are up against.Quick Overview--------------o 65c816 CPU running at up to 3.58MHz.o SPC700 CPU core running at 2.48MHz with built-in custom sound digital  signal processor.o Two custom graphics processors used to produce displays of up to 512x478  pixels with up to 32768 colours, 128 sprites, scaling, rotation, and mosaic  effects, scrolling over a virtual screen, transparency, coloured lens and  window effects and raster effects.o 128k work RAM, 64k sound CPU RAM and 64k video RAM.Game packs can include:o Up to 6MBytes (or more) of ROM containing the game code, graphics and sound  data.o Additional, battery-backed RAM (S-RAM) used to save game positions.o 10.5/21MHz RISC CPU (Super FX) used to implement some 3D games and add  special effects to games.o A maths co-processor (DSP1) used by some games with lots of physics  calculations involved (Pilot Wings) or mainly as a protection device  (Mario Kart).o Other custom chips produced by some software companies to help speed up  games, fit more graphics into a given sized ROM or act as a protection  device.Users could buy:o A five player adapter, allowing up to five people to play at once on games  that supported it.o A 2-button mouse, originally supplied with a paint program.o A light-gun that looked like riffle; it used infra-red to provide wire-less  communication between the gun and the console unit. About 10 games  supported it.o A GameBoy adapter that allowed the owners to play GameBoy games on their  SNES, some in colour.o Copier units that plugged into the cartridge slot on the SNES and allowed  game pak ROMs to be downloaded into RAM on the copier and saved onto  disk. The game could then be played without the original ROM being present  - unless the game pack contained additional hardware, or the game ROM code  tried to detect the copier being present and deliberately crashed the game.More Detail-----------65c816------The 65c816 is an 8/16-bit CPU that is basically an enhanced 6502: it evenhas an emulation mode to make it behave almost exactly like a real 6502. Nodoubt Nintendo were hoping to provide a compatibility mode for old NESgames, but failed.The CPU features a 24-bit address bus and 8-bit data bus allowing a 16Mbaddress space. It has an accumulator and two index registers, all can beswitch to either 8 or 16-bit mode.The address space is broken up into 256 banks, each bank being 64k in size,although there are addressing modes to treat the entire address space as onecontinuous block. Bank 0 is special in that the stack, a few addressingmodes and the interrupt and reset vectors all reside there. The stackpointer is 16-bits wide.The 6502 has an addressing mode called zero-page, where the 1-byte addressspecified in the instruction refers to a location in the first 256 bytes ofmemory, allowing for 2-byte instructions and increased execution speed. The65c816 extends this idea by allowing the 'zero-page' to be moved anywhereinside bank 0 by use of the 16-bit direct page register.There are other addressing modes available that use the bank specified inthe data bank register, again to help reduce code size and speed upexecution.Code normally executes in single bank at a time, the current bank numberbeing specified by the 8-bit program bank register.  There are instructionsavailable to call subroutines in other banks or just jump to code in otherbanks.The 65c816 internally runs at 3.58MHz, but other SNES hardware can temporarilyslow it down to 2.58MHz or even 1.56MHz when the CPU attempts read from themor write to them. In particular, there are a mixture of fast and slow ROMsinside game packs, slow ROMs can only be accessed at 2.58MHz.The 65c816 has direct access to 128k of work RAM plus any additional RAM thatmight be in the game pack. Video RAM and sound RAM cannot be accesseddirectly.SPC700------The SPC700 is an 8-bit CPU core, similar to a 6502, but with a differentinstruction set, some new addressing modes and multiple and divideinstructions, together with a custom sound digital signal processor, allcontained inside one module.The SPC700 and the 65c816 communicate via 4 bi-directional, 8-bit I/O ports.The SPC700 has its own 64k RAM used to store a program downloaded from 65c816and sound sample data. The CPU has a built-in, small, 64 byte ROM used as boot-strap code todownload a more complex program and sample data from the game ROM via the65c816. The ROM can be switched off and replaced with 64 bytes of RAM oncethe boot-strap code has done its work.The sound DSP can only play compresses sound samples, compressed using acustom fixed-ratio compression algorithm that compresses 16 16-bit samplesinto 8 bytes plus a one byte header. The minimum unit of a sample is oneblock. The block header byte contains a shift and filter value (algorithmdecompression information) plus a last block flag and a loop flag; the loopflag is only used if the last block flag is also set.There are 8 separate sound channels allowing up to 8 samples to be playedsimultaneously. Each sound channel has a left and right volume setting andfrequency setting. A hardware volume envelope can be defined for eachchannel, and echo effects can be turned on and off individually for eachchannel. The combined echo waveform can be subjected to an 8-tap FIRdigital filter. The wave output of a channel can be used to modulate thefrequency of the next sound channel, in numerical order.The DSP also has a white noise source that can played on a sound channelinstead of sample data. All 8 channels, and any echo sound data, are mixedtogether and subjected to a left and right master volume control.The DSP also provides 3 interval timers, the first two running at 8kHz andthe last at 64kHz; games normally only use one of them to provide a constantmusic playback rate.Interrupts----------The 65c816 provides two external interrupt sources: IRQ, which can be masked,and NMI, which cannot. The IRQ line is connected to an output on one of the graphics chips, that,it turn can be programmed to generate an IRQ at the start of a scanline, ata particular position on a scanline or at a particular position of everyscanline. The IRQ line also is connected to one of the pins on the ROMconnector, so additional hardware inside the ROM game pak, such as the Super FXand SA-1 chips, can also generate interrupts.The NMI line is connected to another output of one of the graphics chips andit can be programmed to generate an interrupt when the vertical blank periodstarts.The SPC700 chip can also generate interrupts, but they are not used on theSNES and probably physically not connected.Joypad Reading--------------Data from the SNES joy-pads is sent serially between the pad and the console.Games can choose to read each bit in, one at a time or allow hardware insideone of the custom chips to automatically read the joy-pad values once everyframe. The game can then read the values from registers.SNES joy-pads themselves have direction controls and 8 other buttons namedA, B, X, Y, Left, Right, Start and Select.Colour Palette--------------The SNES has a 256 entry 15-bit colour palette, allowing for 256 colours onscreen out of a total palette of 32768. However, games can and do changecolour entries during a frame, this combined with hardware colour valueaddition and subtraction and an overall brightness setting, can easily boostthe number of colours on screen to several thousand!Tiles-----All SNES graphics data is made up of tiles, a tile being an 8x8 block ofpixels, with each pixel made up of 2, 4 or 8 bits, allowing for 4, 16 or 256colours per pixel.To complicate matters, the SNES hardware stores tile data in planar format,that is all the bit 1's of all the pixels of a tile are stored together,then all the bit 2's and so on. Its like a sequence of 1-bit deep 8x8 pixelblocks.When a tile is used as background data, a 3-bit palette start address isassociated with each tile, allowing the programmer to choose a differentblock of colours for each tile from the larger SNES colour palette. Spritescan only use tiles of depth 4 (16 colours), but each sprite has a palettestart address.Background Graphic Modes------------------------The SNES has eight background graphics modes, each mode varies the number ofindividual background layers available, the depth of each layer and whatother features are available. Programmers can change the background modeduring a frame.The two most commonly used modes are mode 1, which allows two 16-colourbackground layers and one 4-colour layer and mode 7, which allows one 256-colour layer, but the layer can be rotated, stretched, squashed, sheared andgenerally messed around with.Each background is made up 32x32 8x8 tiles. However, the number of tiles ineach direction can be double as can the individual tile size. This allows fora virtual background size of 256x256 up to 1024x1024. Switching to 16x16 tilesize actually just groups four 8x8 tiles together, there is no true 16x16 tileon the SNES.Backgrounds have a pre-defined priority order - when pixels from onebackground layer overlap on the screen pixels from another background layer,the pixels from the lower numbered background are displayed.Each tile can be flipped horizontally or vertically, has a 3-bit "palettenumber" and a priority bit.  The priority bit is used to make all the pixelsin the tile appear in front of pixels from another background layer orsprite that would otherwise normally appear in front of them. Colour 0 fromeach tile is special and means "transparent", allowing non-transparentpixels from background layers or sprites "underneath" to be visible.Normally only 256x224 or 256x239 pixels are visible on screen and backgroundshave a scroll setting that allows the screen to act as a window onto anyportion of their virtual size.Two background modes are available that can display up to 512x478 pixels,but they're not used by many games because the flicker, caused by theinterlace used display the image on a standard television, would give gameplayers headaches.Sprites-------The SNES has 128 hardware sprites, each sprite can be made up of one orseveral 16-colour, 8x8 tiles. Each sprite is assigned a number which definesits pixel priority when two sprites overlap on screen, it also has a separatesprite-to-background priority value which defines whether the sprite shouldappear in front or behind of the various background layers. Each sprite alsohas a 3-bit palette number, horizontal and vertical flip flags, a start tilenumber and, of course, an X and Y position.There's no way to turn off a sprite - if you don't want it to be visible you