?? rs485.asm
字號:
; CC5X Version 3.1D, Copyright (c) B Knudsen Data
; C compiler for the PICmicro family
; ************ 10. May 2004 15:33 *************
processor 16F873
radix DEC
INDF EQU 0x00
TMR0 EQU 0x01
PCL EQU 0x02
STATUS EQU 0x03
FSR EQU 0x04
TRISA EQU 0x85
TRISB EQU 0x86
PCLATH EQU 0x0A
PA0 EQU 3
PS0 EQU 0
PS1 EQU 1
PS2 EQU 2
PSA EQU 3
T0CS EQU 5
Carry EQU 0
Zero_ EQU 2
RP0 EQU 5
RP1 EQU 6
IRP EQU 7
INTF EQU 1
T0IF EQU 2
T0IE EQU 5
GIE EQU 7
TXREG EQU 0x19
RCREG EQU 0x1A
TRISC EQU 0x87
SPBRG EQU 0x99
PEIE EQU 6
TMR1IF EQU 0
TMR2IF EQU 1
SSPIF EQU 3
TXIF EQU 4
RCIF EQU 5
CREN EQU 4
SPEN EQU 7
SSPIE EQU 3
TXIE EQU 4
RCIE EQU 5
TRMT EQU 1
BRGH EQU 2
SYNC EQU 4
TXEN EQU 5
TX9 EQU 6
IO1 EQU 5
IO2 EQU 6
IO3 EQU 7
C_EN EQU 2
rc_temp EQU 0x2E
rxbuf EQU 0x2F
uchCRCHi EQU 0x37
uchCRCLo EQU 0x38
addr EQU 0x39
txbuf EQU 0x3A
receive_count EQU 0x42
dis_hz EQU 0x43
dis_current EQU 0x44
set_hz EQU 0x45
set_run EQU 0x46
dis_error EQU 0x47
dis_running EQU 0x49
receive_ok EQU 0
transfer_ok EQU 1
_8ms_count_ok EQU 2
s1_save EQU 0x20
s2 EQU 0x22
s3 EQU 0x23
sv_FSR EQU 0x24
puchMsg EQU 0x28
crc_count EQU 0x29
uindex EQU 0x2A
temp16 EQU 0x2B
i EQU 0x25
temp16_2 EQU 0x26
ci EQU 0x2D
ci_2 EQU 0x2D
GOTO main
; FILE rs485.c
;#include "16f873.h"
;#include "int16cxx.h"
;
;#define ENABLE 1
;#define DISABLE 0
;#define TRUE 1
;#define FAULT 0
;#define RECEIVE_EN 0
;#define TRANSFER_EN 1
;
;#pragma bit IO1 @ PORTB.5
;#pragma bit IO2 @ PORTB.6
;#pragma bit IO3 @ PORTB.7
;#pragma bit C_EN @ PORTC.2
;
;#pragma origin = 0x4
ORG 0x0004
;
;uns8 rc_temp,rxbuf[8],uchCRCHi,uchCRCLo,addr,txbuf[8],receive_count,dis_hz,dis_current;
;uns8 set_hz,set_run;
;uns16 dis_error,dis_running;
;bit receive_ok,transfer_ok,_8ms_count_ok;
;
;/* Table of CRC values for high-order byte */
;
;const char auchCRCHi[] = {
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
;0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
;0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1,
;0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1,
;0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40,
;0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1,
;0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40,
;0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
;0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
;0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
;0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40,
;0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1,
;0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41,
;0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0,
;0x80, 0x41, 0x00, 0xC1, 0x81, 0x40
;} ;
;
;/* Table of CRC values for low-order byte */
;
;const char auchCRCLo[] = {
;0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06,
;0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD,
;0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09,
;0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A,
;0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC, 0x14, 0xD4,
;0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3,
;0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3,
;0xF2, 0x32, 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4,
;0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A,
;0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29,
;0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED,
;0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26,
;0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60,
;0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67,
;0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F,
;0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, 0x69, 0xA9, 0xA8, 0x68,
;0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA, 0xBE, 0x7E,
;0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5,
;0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71,
;0x70, 0xB0, 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92,
;0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C,
;0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B,
;0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B,
;0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C,
;0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42,
;0x43, 0x83, 0x41, 0x81, 0x80, 0x40
;} ;
;
;interrupt server(void)
;{
server
; uns8 temp8;
; int_save_registers // W, STATUS (and PCLATH)
MOVWF s1_save
SWAPF STATUS,W
BCF 0x03,RP0
BCF 0x03,RP1
MOVWF s2
MOVF PCLATH,W
MOVWF s3
CLRF PCLATH
; char sv_FSR=FSR;
MOVF FSR,W
MOVWF sv_FSR
; if(T0IF)
BTFSS 0x0B,T0IF
GOTO m001
; {
; TMR0=100; //8ms interrupt
MOVLW .100
MOVWF TMR0
; PS2=1; //prescale value=1:256
BSF 0x03,RP0
BSF 0x81,PS2
; PS1=1; //5000KHz/256=19.53125KHz,19.53125K/156=0.125KHz(8ms)
BSF 0x81,PS1
; PS0=1;
BSF 0x81,PS0
; _8ms_count_ok=ENABLE;
BCF 0x03,RP0
BSF 0x4B,_8ms_count_ok
; T0IF=0;
BCF 0x0B,T0IF
; }
; if(INTF)
m001 BTFSC 0x0B,INTF
; {
; INTF=0;
BCF 0x0B,INTF
; }
; if(TMR1IF)
BTFSC 0x0C,TMR1IF
; {
; TMR2IF=0;
BCF 0x0C,TMR2IF
; }
; if(RCIF)
BTFSS 0x0C,RCIF
GOTO m005
; {
; rc_temp=RCREG;
MOVF RCREG,W
MOVWF rc_temp
; if(receive_ok==FAULT)
BTFSC 0x4B,receive_ok
GOTO m004
; {
; if(_8ms_count_ok)
BTFSC 0x4B,_8ms_count_ok
; receive_count=0;
CLRF receive_count
; if(receive_count<8)
MOVLW .8
SUBWF receive_count,W
BTFSC 0x03,Carry
GOTO m002
; rxbuf[receive_count]=rc_temp;
MOVLW .47
ADDWF receive_count,W
MOVWF FSR
MOVF rc_temp,W
MOVWF INDF
; if(receive_count==7 && addr==rxbuf[0])
m002 MOVF receive_count,W
XORLW .7
BTFSS 0x03,Zero_
GOTO m003
MOVF addr,W
XORWF rxbuf,W
BTFSC 0x03,Zero_
; receive_ok=TRUE;
BSF 0x4B,receive_ok
; receive_count++;
m003 INCF receive_count,1
; }
;
; _8ms_count_ok=DISABLE;
m004 BCF 0x4B,_8ms_count_ok
; TMR0=100; //timer0 reset,count again
MOVLW .100
MOVWF TMR0
;
; RCIF=0;
BCF 0x0C,RCIF
; }
; if(SSPIF && SSPIE)
m005 BTFSS 0x0C,SSPIF
GOTO m006
BSF 0x03,RP0
BTFSS 0x8C,SSPIE
GOTO m006
; {
; SSPIF=0;
BCF 0x03,RP0
BCF 0x0C,SSPIF
; }
; FSR=sv_FSR;
m006 BCF 0x03,RP0
MOVF sv_FSR,W
MOVWF FSR
; int_restore_registers
MOVF s3,W
MOVWF PCLATH
SWAPF s2,W
MOVWF STATUS
SWAPF s1_save,1
SWAPF s1_save,W
;}
RETFIE
;
;page1 uns16 crc16(uns8 *puchMsg,uns8 crc_count)
;{
ORG 0x0800
_const1
MOVWF ci
MOVLW .8
MOVWF PCLATH
MOVF ci,W
ADDLW .8
BTFSC 0x03,Carry
INCF PCLATH,1
MOVWF PCL
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .1
RETLW .192
RETLW .128
RETLW .65
RETLW .0
RETLW .193
RETLW .129
RETLW .64
_const2
MOVWF ci_2
MOVLW .9
MOVWF PCLATH
MOVF ci_2,W
ADDLW .16
BTFSC 0x03,Carry
INCF PCLATH,1
MOVWF PCL
RETLW .0
RETLW .192
RETLW .193
RETLW .1
RETLW .195
RETLW .3
RETLW .2
RETLW .194
RETLW .198
RETLW .6
RETLW .7
RETLW .199
RETLW .5
RETLW .197
RETLW .196
RETLW .4
RETLW .204
RETLW .12
RETLW .13
RETLW .205
RETLW .15
RETLW .207
RETLW .206
RETLW .14
RETLW .10
RETLW .202
RETLW .203
RETLW .11
RETLW .201
RETLW .9
RETLW .8
RETLW .200
RETLW .216
RETLW .24
RETLW .25
RETLW .217
RETLW .27
RETLW .219
RETLW .218
RETLW .26
RETLW .30
RETLW .222
RETLW .223
RETLW .31
RETLW .221
RETLW .29
RETLW .28
RETLW .220
RETLW .20
RETLW .212
RETLW .213
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