//--------------------------------------------------------------------------//
// Memory DMA Example for the ADSP-BF533									//
//																			//
// Version:		0.90														//
// Author:		Michael Kuegler												//
// Date:		30.04.2003													//
//																			//
// Tested with																//
// Hardware:	ADSP-BF533 EZ-KIT Lite 1.0, Chip BF532 Revision 0.0			//
// Software:	VisualDSP++ 3.1, Compiler Version 6.3.0						//
//																			//
// Description:	This program configures a Memory DMA transfer to copy the	//
//				content of the source array s_MemDMA0_Src_Array to the		//
//				destination array s_MemDMA0_Dst_Array. The transfer is done	//
//				continuously using MemDMA0 in Descriptor mode.				//
//--------------------------------------------------------------------------//

#include <sys\exception.h>
#include <cdefBF532.h>

// ARRAY_SIZE describes the length of both arrays in memory (number of words to transfer)
#define ARRAY_SIZE		0x10
#define DESCRIPTOR_SIZE	7

//--------------------------------------------------------------------------//
// Variables																//
//--------------------------------------------------------------------------//
volatile short s_MemDMA0_Src_Array[ARRAY_SIZE];
volatile short s_MemDMA0_Dst_Array[ARRAY_SIZE];

volatile unsigned short us_MemDMA0_Src_Descriptor[DESCRIPTOR_SIZE];
volatile unsigned short us_MemDMA0_Dst_Descriptor[DESCRIPTOR_SIZE];

//--------------------------------------------------------------------------//
// Function:	MemDMA0_ISR													//
//--------------------------------------------------------------------------//
EX_INTERRUPT_HANDLER(MemDMA0_ISR)
{
}

//--------------------------------------------------------------------------//
// Function:	Init_MemDMA0												//
//--------------------------------------------------------------------------//
void Init_MemDMA0(void)
{
	// configure MemDMA0 Source Descriptor block in memory
	us_MemDMA0_Src_Descriptor[0] = (unsigned short)((unsigned int)us_MemDMA0_Src_Descriptor & 0xffff);
	us_MemDMA0_Src_Descriptor[1] = (unsigned short)((unsigned int)us_MemDMA0_Src_Descriptor >> 16);
	us_MemDMA0_Src_Descriptor[2] = (unsigned short)((unsigned int)s_MemDMA0_Src_Array & 0xffff);
	us_MemDMA0_Src_Descriptor[3] = (unsigned short)((unsigned int)s_MemDMA0_Src_Array >> 16);
	us_MemDMA0_Src_Descriptor[4] = 0x77a5;
	us_MemDMA0_Src_Descriptor[5] = ARRAY_SIZE;
	us_MemDMA0_Src_Descriptor[6] = 0x0002;
	
	
	// configure MemDMA0 Destination Descriptor block in memory
	us_MemDMA0_Dst_Descriptor[0] = (unsigned short)((unsigned int)us_MemDMA0_Dst_Descriptor & 0xffff);
	us_MemDMA0_Dst_Descriptor[1] = (unsigned short)((unsigned int)us_MemDMA0_Dst_Descriptor >> 16);
	us_MemDMA0_Dst_Descriptor[2] = (unsigned short)((unsigned int)s_MemDMA0_Dst_Array & 0xffff);
	us_MemDMA0_Dst_Descriptor[3] = (unsigned short)((unsigned int)s_MemDMA0_Dst_Array >> 16);
	us_MemDMA0_Dst_Descriptor[4] = 0x77a7;
	us_MemDMA0_Dst_Descriptor[5] = ARRAY_SIZE;
	us_MemDMA0_Dst_Descriptor[6] = 0x0002;

	// enable MemDMA0 transfers
	*pMDMA_S0_NEXT_DESC_PTR	= us_MemDMA0_Src_Descriptor;
	*pMDMA_D0_NEXT_DESC_PTR	= us_MemDMA0_Dst_Descriptor;
	*pMDMA_S0_CONFIG		= 0x77a5;
	*pMDMA_D0_CONFIG		= 0x77a7;
}

//--------------------------------------------------------------------------//
// Function:	Init_Interrupts												//
//--------------------------------------------------------------------------//
void Init_Interrupts(void)
{
	// assign core IDs to interrupts
	*pSIC_IAR0 = 0xffffffff;
	*pSIC_IAR1 = 0xffffffff;
	*pSIC_IAR2 = 0xff6fffff;					// MemDMA0 -> ID6

	// assign ISRs to interrupt vectors
	register_handler(ik_ivg13, MemDMA0_ISR);	// MemDMA0 ISR -> IVG 13

	// enable MemDMA0 interrupt
	*pSIC_IMASK = 0x00200000;
}

void main(void)
{
	short sTemp;

	// initialise source array
	for(sTemp = 0; sTemp < ARRAY_SIZE; sTemp++)	s_MemDMA0_Src_Array[sTemp] = sTemp + 1;

	Init_MemDMA0();
	Init_Interrupts();

	while(1);
}