?? avr-2.txt
字號:
rcall putc
ldi u_data,0x56 ; 'V'
rcall putc
ldi u_data,0x52 ; 'R'
rcall putc
ldi u_data,0x20 ; ' '
rcall putc
ldi u_data,0x49 ; 'I'
rcall putc
ldi u_data,0x53 ; 'S'
rcall putc
ldi u_data,0x50 ; 'P'
rcall putc
ret
;***************************************************************************
;*
;* RESET
;*
;* DESCRIPTION
;* Initialization
;*
;***************************************************************************
RESET: clr temp1
out GIMSK,temp1 ; disable external interrupt
ser temp1 ; Initialize
out PORTD,temp1
set_reset ; set RESET=1
out DDRB,temp1 ; ddrb_release
ser temp1
out PORTB,temp1
rcall u_init ; Initialize UART
sei ; Enable interrupts
;***************************************************************************
;*
;* PROGRAM
;* waitcmd -> main
;*
;* DESCRIPTION
;* Wait for and execute commands.
;*
;***************************************************************************
waitcmd:rcall getc ; while (getc() == ESC) {};
cpi u_data,0x1b
breq waitcmd
;**** Device Type ****
cpi u_data,0x54 ; 'T' Device type
brne w0
rcall getc ; getc(); // dummy
mov device,u_data ; putc(device);
rjmp put_ret
;**** Return Software Identifier ****
w0: cpi u_data,0x53 ; 'S' Return software identifier
brne w1
rcall show_id ; show_id();
rjmp waitcmd
;**** Return Software Version ****
w1: cpi u_data,0x56 ;'V' Return software version
brne w2
ldi u_data,0x30+SW_MAJOR ; putc(0x30+SW_MAJOR);
rcall putc
ldi u_data,0x30+SW_MINOR ; putc(0x30+SW_MINOR);
rcall putc
rjmp waitcmd
;**** Return Hardware Version ****
w2: cpi u_data,0x76 ;'v' Return hardware version
brne w3
ldi u_data,0x30+HW_MAJOR ; putc(0x30+HW_MAJOR);
rcall putc
ldi u_data,0x30+HW_MINOR ; putc(0x30+HW_MINOR);
rcall putc
rjmp waitcmd
;**** Show Supported Devices ****
w3: cpi u_data,0x74 ; 't' Show supported devices
brne w4
ldi eeaddr,0x02
ldi temp3,255
ldi temp3,34 ;共支持32種芯片
w3a: rcall EERead
;w3a: mov u_data,temp3
rcall putc
inc eeaddr
dec temp3
brne w3a
; ldi u_data,0
; rcall putc
rjmp waitcmd
;**** Return Programmer Type ****
w4: cpi u_data,0x70 ; 'p' Return programmer type
brne w5
ldi u_data,0x53 ; putc('S'); // 回應是串行編程器
rcall putc
rjmp waitcmd
;**** Set LED ****
w5: cpi u_data,0x78 ; 'x' Set LED (ignored)
brne w6
rjmp put_ret
;**** Clear LED ****
w6: cpi u_data,0x79 ; 'y' Clear LED (ignored)
brne w7
rjmp put_ret
;**** Enter Programming Mode ****
w7: cpi u_data,0x50 ; 'P' 進入編程模式
brne w8
rcall spiinit ; spiinit();
rjmp put_ret
;**** Wait Program Memory ****
;* USAGE
;* wait_pm(byte cmd, byte c_data);
;*
;* cmd : 0x28 - wait for high byte written
;* 0x20 - wait for low byte written
;* u_data : current data written
;wait_pm: ; do
; {
; mov s_data,cmd ; wrser(cmd); // SPI write (byte1)
; rcall wrser
; mov s_data,addrh ; wrser(addrh); // SPI write (byte2)
; rcall wrser
; mov s_data,addrl ; wrser(addrl); // SPI write (byte3)
; rcall wrser
; rcall rdser ; s_data = rdser(); // SPI read (byte4)
; ; }
; cp s_data,u_data ; while(s_data != u_data);
; brne wait_pm
; ret
;**** Write Program Memory, High Byte ****
w8: cpi u_data,0x43 ; 'C' Write program memory, high byte
brne w9
rcall getc
tst device ; if (device >= AT89S8252)
brpl w81 ; {
rjmp put_err ; goto err();
; // (AT89 series have byte wide program memory !)
; }
w81: ldi s_data,0x48 ; wrser(0x48); // SPI write (byte 1)
rcall wrser
mov s_data,addrh ; wrser(addrh); // SPI write (byte 2)
rcall wrser
mov s_data,addrl ; wrser(addrl); // SPI write (byte 3)
rcall wrser
cpi device,S01838C ; invert data on 01838 rev C!
brne w81b
com u_data
w81b:
mov s_data,u_data ; wrser(u_data); // SPI write (byte 4)
rcall wrser
cpi device,S01838C ; no delay for S01838 (Uses Page Write Mode instead)
breq w82
cpi device,S01838D
breq w82
ldi temp1,0x40 ; delay(0x20); // 24585 cycles delay
rcall delay ; // Page mode requires no delay!
w82:
ldi temp1,0x01 ; Auto increment address!!!!
clr temp2
add addrl,temp1
adc addrh,temp2
rjmp put_ret ; goto reply();
;**** Write Program Memory, Low Byte ****
w9: cpi u_data,0x63 ; 'c' Write program memory, low byte
brne w12
rcall getc
tst device ; if (device != AT89S8252)
brmi w989 ; {
ldi s_data,0x40 ; wrser(0x40); // SPI write (byte 1)
rcall wrser
mov s_data,addrh ; s_data = addrh;
rjmp w91 ; }
; else
w989: ; {
mov s_data,addrh ; s_data = (addrh << 3) | 0x02;
rcall shift_s_data3
ori s_data,0x02
w91: ; }
rcall wrser ; wrser(s_data); // SPI write (byte 2)
mov s_data,addrl ; wrser(addrl); // SPI write (byte 3)
rcall wrser
cpi device,S01838C ; invert data on 01838 rev C!
brne w91b
com u_data
w91b:
mov s_data,u_data ; wrser(u_data); // SPI write (byte 4)
rcall wrser
cpi device,S01838C ; no delay for S01838 (Uses Page Write Mode instead)
breq w92
cpi device,S01838D
breq w92
ldi temp1,0x40 ; delay(0x20)=6.1Ms; // 24585 cycles delay
rcall delay ; Page mode requires no delay!
w92:
rjmp put_ret ; goto reply();
;**** Read Program Memory ****
w12: cpi u_data,0x52 ; 'R' Read program memory
brne w10 ;
tst device ; if (device != AT89S8252)
brmi w1289 ; {
ldi s_data,0x28 ; wrser(0x28); // SPI write (byte 1)
rcall wrser
mov s_data,addrh ; s_data = addrh;
rjmp w121 ; }
; else
w1289: ; {
mov s_data,addrh ; s_data = (addrh << 3) | 0x01;
rcall shift_s_data3
ori s_data,0x01
w121: ; }
rcall wrser ; wrser(s_data); // SPI write (byte 2)
mov s_data,addrl ; wrser(addrl); // SPI write (byte 3)
rcall wrser
rcall rdser ; putc(rdser()); // Send data (byte 4)
mov u_data,s_data
rcall putc
tst device ; if (device == AT89S8252)
brpl w122 ; {
rjmp waitcmd ; goto waitcmd();
; }
; else
w122: ; {
ldi s_data,0x20 ; wrser(0x20); // SPI write (byte 1)
rcall wrser
mov s_data,addrh ; wrser(addrh); // SPI write (byte 2)
rcall wrser
mov s_data,addrl ; wrser(addrl); // SPI write (byte 3)
rcall wrser
rcall rdser ; putc(rdser()); // Send data (byte 4)
mov u_data,s_data
rcall putc
ldi temp1,0x01 ; Auto increment address !!!!
clr temp2
add addrl,temp1
adc addrh,temp2
rjmp waitcmd ; goto waitcmd();
; }
shift_s_data3:
lsl s_data
lsl s_data
lsl s_data
ret
;**** Load Address ****
w10: cpi u_data,0x41 ; 'A' Load address
brne w11
rcall getc ; addrh = getc();
mov addrh,u_data
rcall getc ; addrl = getc();
mov addrl,u_data
rjmp put_ret ; goto reply();
;**** Write Data Memory ****
w11: cpi u_data,0x44 ; 'D' Write data memory
brne w13
rcall getc
tst device
brmi w1189
ldi s_data,0xc0
rcall wrser
mov s_data,addrh
rjmp w111
w1189: mov s_data,addrh
rcall shift_s_data3
ori s_data,0x06
w111: rcall wrser
mov s_data,addrl
rcall wrser
mov s_data,u_data
rcall wrser
ldi temp1,0x7f
rcall delay
rjmp put_ret
;;**** Read Data Memory ****
w13: cpi u_data,0x64 ; 'd' Read data memory
brne w14
tst device ; if (device != AT89S8252)
brmi w1389 ; {
ldi s_data,0xa0 ; wrser(0xA0); // SPI write (byte 1)
rcall wrser
mov s_data,addrh ; s_data = addrh;
rjmp w131 ; }
; else
w1389: ; {
mov s_data,addrh ; s_data = (addrh << 3) | 0x05;
rcall shift_s_data3
ori s_data,0x05
w131: ; }
rcall wrser ; wrser(s_data); // SPI write (byte 2)
mov s_data,addrl ; wrser(addrl); // SPI write (byte 3)
rcall wrser
rcall rdser ; putc(rdser()); // Send data (byte 4)
mov u_data,s_data
rcall putc
rjmp waitcmd ; goto waitcmd();
;**** Leave Programming Mode ****
w14: cpi u_data,0x4c ; 'L' Leave programming mode
brne w15
ddrb_release
tst device
brmi w141
set_reset ; set RESET = 1
rjmp put_ret
w141: clr_reset ; set RESET = 0
rjmp put_ret
;**** Chip Erase ****
w15: cpi u_data,0x65 ; 'e' Chip erase
brne w16
ldi s_data,0xac
rcall wrser
tst device
brmi w1589
ldi s_data,0x80
rcall wrser
w1589: ldi s_data,0x04
rcall wrser
ldi s_data,0x00
rcall wrser
ldi temp1,0x7f
rcall delay
rjmp put_ret
;**** Write Lock Bits ****
w16: cpi u_data,0x6c ; 'l' Write lock bits
brne w17
rcall getc
ldi s_data,0xac
rcall wrser
mov s_data,u_data
tst device
brmi w1689
andi s_data,0x06
ori s_data,0xe0
rcall wrser
ldi s_data,0x00
rcall wrser
rjmp w162
w1689: andi s_data,0xe0
ori s_data,0x07
rcall wrser
w162: ldi s_data,0x00
rcall wrser
ldi temp1,0x7f
rcall delay
rjmp put_ret
;**** Read Signature Bytes ****
w17: cpi u_data,0x73 ; 's' Read signature bytes
brne w18
tst device
brpl w17begin
rjmp put_err
w17begin:
ldi param1,0x02
rcall w17call
ldi param1,0x01
rcall w17call
ldi param1,0x00
rcall w17call
rjmp waitcmd
w17call:ldi s_data,0x30
rcall wrser
ldi s_data,0x00
rcall wrser
mov s_data,param1
rcall wrser
rcall rdser
mov u_data,s_data
rcall putc
ret
;**** Write Program Memory Page ****
w18: cpi u_data,0x6D ; 'm' 進入分頁式編程
brne w19
ldi s_data,0x4c ; 頁式編程指令（第一字節）
rcall wrser
mov s_data,addrh ; 高位地址 （第二字節）
rcall wrser
mov s_data,addrl ; 低位地址 （第三字節）
rcall wrser
ldi s_data,0x00 ; 結束 （第四字節）
rcall wrser
ldi temp1,0xff ; 大約延時(0xFF)49毫秒(0x7F)24毫秒
rcall delay
rjmp put_ret ; 應答
;**** Universal Command ****
w19: cpi u_data,0x3A ; ':' 通用指令Universal Command
brne w99
rcall getc
mov cmd1,u_data
rcall getc
mov cmd2,u_data
rcall getc
mov cmd3,u_data
rcall universal
ldi temp1,0xff ; 大約延時24毫秒
rcall delay
rjmp put_ret
universal:
mov s_data,cmd1
rcall wrser
mov s_data,cmd2
rcall wrser
mov s_data,cmd3
rcall wrser
rcall rdser
mov u_data,s_data
rcall putc
ret
w99: cpi u_data,'E'
brne put_err
ldi u_data,'e'
rcall putc
rjmp put_ret
;**** Command Error ****
put_err:ldi u_data,0x3f ; putc('?'); \\ send '?'
rcall putc
rjmp waitcmd
;**** Reply Command ****
put_ret:ldi u_data,0x0d ; putc(0x0D); \\ send CR
rcall putc
rjmp waitcmd
EERead:
sbic EECR,EEWE ;if EEWE not clear
rjmp EERead ; wait more
out EEAR,eeaddr ;output address for 1200, commented out !
sbi EECR,EERE ;set EEPROM Read strobe
;This instruction takes 4 clock cycles since
;it halts the CPU for two clock cycles
in u_data,EEDR ;get data
ret
.eseg
devicee:.db 0x00,0x00
.db 0x13 ; 1,AT90S1200*
.db 0x20 ; 2,AT90S2313*
.db 0x28 ; 3,AT90S4414*
.db 0x30 ; 4,AT90S4433*
.db 0x82 ; 5,AT90s4434///////空號
.db 0x34 ; 6,AT90S2333*
.db 0x38 ; 7,AT90S8515*
.db 0x40 ; 8,S01838C*
.db 0x41 ; 9,ATmega103(S01838D)*
.db 0x42 ;10,ATmega603*
.db 0x43 ;11,ATmega103B*
.db 0x44 ;12,ATmega103B-BOOT*
.db 0x48 ;13,AT90S2323*
.db 0x4C ;14,AT90S2343*
.db 0x50 ;15,ATtiny10*
.db 0x51 ;16,ATtiny11*
.db 0x70 ;17,AT90c8534*
.db 0x72 ;18,ATmega32*
.db 0x55 ;19,ATtiny12*
.db 0x56 ;20,ATtiny15*
.db 0x58 ;21,ATtiny19*
.db 0x5c ;22,ATtiny28*
.db 0x60 ;23,ATmega161*
.db 0x64 ;24,ATmega163*
.db 0x65 ;25,ATmega83*
.db 0x66 ;26,ATmega163 BOOT*
.db 0x67 ;27,ATmega83 BOOT*
.db 0x68 ;28,AT90s8535*
.db 0x6C ;29,AT90S4434*
.db 0x80 ;30,AT89c1051*
.db 0x81 ;31,AT89c2051*
.db 0x86 ;32,AT89S8252 *
.db 0x87 ;33,AT89S53*
.db 0x00 ;34,ends
;**** End of File ****
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