#define GLOBAL_DEFINE	
#include "includes.h"



#define  TASK_STK_SIZE                 512       /* Size of each task's stacks (# of WORDs)            */
#define  N_TASKS                        9       /* Number of identical tasks                          */


/*--------------------------*/
/* Buffer Descriptor Format */
/*--------------------------*/

typedef struct BufferDescriptor 
{
   unsigned short bd_cstatus;     /* control and status */
   unsigned short bd_length;      /* transfer length */
   unsigned char  *bd_addr;       /* buffer address */

} BD;
 

/*-------------------------------*/
/* Buffer Descriptor Ring format */
/*-------------------------------*/



typedef struct smc_uart_pram	/* uart-specific parameter ram */
{
   unsigned short	rbase;		/* Rx BD Base Address */
   unsigned short	tbase;		/* Tx BD Base Address */
   unsigned char	   rfcr;		   /* Rx function code */
   unsigned char	   tfcr;		   /* Tx function code */
   unsigned short	mrblr;		/* Rx buffer length */
   unsigned int	   rstate;		/* Rx internal state */
   unsigned int	   rptr;		   /* Rx internal data pointer */
   unsigned short	rbptr;		/* rb BD Pointer */
   unsigned short	rcount;		/* Rx internal byte count */
   unsigned int	   rtemp;		/* Rx temp */
   unsigned int	   tstate;		/* Tx internal state */
   unsigned int	   tptr;		   /* Tx internal data pointer */
   unsigned short	tbptr;		/* Tx BD pointer */
   unsigned short	tcount;		/* Tx byte count */
   unsigned int	   ttemp;		/* Tx temp */
   unsigned short	max_idl;	   /* Maximum IDLE Characters */
   unsigned short	idlc;		   /* Temporary IDLE Counter */
   unsigned short	brkln;		/* Last Rx Break Length */
   unsigned short	brkec;		/* Rx Break Condition Counter */
   unsigned short	brkcr;		/* Break Count Register (Tx) */
   unsigned short	r_mask;		/* Temporary bit mask */

} upram8xx_t;


BD * RxBD;
BD * TxBD;
static upram8xx_t *upram2;		/* Pointer to UART-PRAM */	
unsigned short *smcmr;
unsigned short *cpcr;
unsigned int *sdcr;
unsigned char *smcm2,*smce2;


OS_STK           TaskStk1[TASK_STK_SIZE];
OS_STK           TaskStk2[TASK_STK_SIZE];
OS_STK           TaskStk3[TASK_STK_SIZE];
OS_STK           TaskStk4[TASK_STK_SIZE];
OS_STK           TaskStk5[TASK_STK_SIZE];
OS_STK           TaskStk6[TASK_STK_SIZE];

char             TaskData1 = 0;
char             TaskData2 = 0;
char             TaskData3 = 0;
char             TaskData4 = 0;
char             TaskData5 = 0;
char             TaskData6 = 0;


/*
 * Can't declare func here for use of "#pragma"
 * void copy_to_ram(void);
 */
 
void SetVecTable(void);
void ticker_start(INT32S ticks_per_sec);
void InitSMC2(void);
void Print(INT8U *str);
void   Task1(void *data);
void   Task2(void *data);
void   Task3(void *data);
void   Task4(void *data);
void   Task5(void *data);
void   Task6(void *data);

extern void DECIntr(void);
void SetLed(void);
/*
void SetLedON(void);
void SetLedOFF(void);
*/

int main(void)
{

		
	//SetLed();
		
	
	InitSMC2();
	
	Print("###################################");
	Print("#                                 #");
	Print("#      Welcom to uC/OS-II!        #");
	Print("#                                 #");
	Print("###################################");	
	Print(" ");

	SetVecTable();
	Print("Set Vector Table in RAM ... OK!");
	Print(" ");

	Print("Begin...");
	Print(" ");

	OSInit ();

	OSTaskCreate(Task1, (void *)&TaskData1, &TaskStk1[TASK_STK_SIZE - 1], 1);
	OSTaskCreate(Task2, (void *)&TaskData2, &TaskStk2[TASK_STK_SIZE - 1], 2);
	OSTaskCreate(Task3, (void *)&TaskData3, &TaskStk3[TASK_STK_SIZE - 1], 3);
	OSTaskCreate(Task4, (void *)&TaskData4, &TaskStk4[TASK_STK_SIZE - 1], 4);
	OSTaskCreate(Task5, (void *)&TaskData5, &TaskStk5[TASK_STK_SIZE - 1], 5);
	OSTaskCreate(Task6, (void *)&TaskData6, &TaskStk6[TASK_STK_SIZE - 1], 6);

	ticker_start (OS_TICKS_PER_SEC);
    
	OSStart();
	
	/* No, it never returns... */ 
	
	return 1;
}


void ticker_start(INT32S ticks_per_second)
{
	INT32U immr = 0xfff00000;

	dec_init = TMBCLKS_PER_SEC / ticks_per_second;
	SMAC_set_decrementer (); 
	
	//*((INT16U *)((INT32U)IMMR_BASE + (INT32U) 0x200)) |= 0x03;
	*((INT16U *)((INT32U)immr + (INT32U) 0x200)) |= 0x03;
	
	asm ("	mtspr EIE,r0"); /* external interrupt enable */ 
}


void InitSMC2(void)
{
	unsigned char ch = '1';
	unsigned long immr;

	immr = 0x80000000;		/* get immr address */


	*(int *)(immr+0xabc) |= 0x0c00;  /* PBPAR :管腳20，21專用*/
	*(int *)(immr+0xab8) &= 0xf3ff;  /* PBDIR :管腳20，21選擇功能0*/
	*(int *)(immr+0xac0) &= 0xf3ff;  /* PBODR :管腳20，21作為輸出*/
	*(int *)(immr+0x9f0) = 0x10034;  /* BRGC1 :26分頻 */
	*(int *)(immr+0xae0) &= 0x0fffffff; 
				/* SIMODE: SMC2 : clock - BRGC1; connect - NMSI mode */


	upram2 = (upram8xx_t *)(immr + 0x3F80);		/* get SMC2 UART-specific parameter(in Memory Map) address */
	upram2->rbase = 0x0000;         /* offset with respect to Daul-RAM base */ 
	upram2->tbase = 0x0008;
	RxBD = (BD *)(immr + 0x2000 +0);
	TxBD = (BD *)(immr + 0x2000 +0x0008);
	
	smcmr = (unsigned short *)(immr + 0xA92);	/* get SMCMR(in Memory Map) address */
	
	cpcr = (unsigned short *)(immr + 0x9C0);	/* get CPCR(in Memory Map) address */
	for((*cpcr) = 0x00d1; (*cpcr) & 0x0001;) ;	
	
	/* INIT RX and TX COMMAND to smc2 ; loop until CPCR flag is cleared */

	sdcr = (unsigned int *)(immr + 0x030);
	(*sdcr) = 0x00000001;

	upram2->rfcr = 0x18;                                            
	upram2->tfcr = 0x18; 

	/*	Init BDs */
	/*    TxBD->bd_cstatus = 0x0000; */
	TxBD->bd_cstatus = 0x2000;      

   	smce2 = (unsigned char *)(immr + 0xA96);
   	smcm2 = (unsigned char *)(immr + 0xA9A);	

	(*smce2)=0xff;
	(*smcm2)=0x00;


	smcmr = (unsigned short *)(immr + 0xA92);	/* get SMCMR(in Memory Map) address */
	(*smcmr) = 0x4820;
	(*smcmr) = 0x4822;

}

/*************************************************
 *
 * NAME		: Print()
 * INPUT		: char  *str
 * RETURN	: void
 * FUNCTION	: Output char from SMC1.
 *
 *************************************************/
void Print(INT8U *str)
{
	
	INT8U *ch;
	INT8U ch1[2];
	INT16U len = 0;
	
	ch1[0] = 10;
	ch1[1] = 13;
	TxBD->bd_addr = ch1;
	TxBD->bd_length = 2;
	TxBD->bd_cstatus |= 0x8000;
	asm("eieio");
	while(TxBD->bd_cstatus & 0x8000) {
		asm("eieio");
	}

	ch = str;
	while (*ch ++) {
		len ++;
	}
		
	TxBD->bd_addr = str;
	TxBD->bd_length = len;
	TxBD->bd_cstatus |= 0x8000;
	asm("eieio");
	while(TxBD->bd_cstatus & 0x8000) {
		asm("eieio");
	}
	
}


void Task1(void *data)
{
    for (;;) {
        Print("-----------------------------------------------------1");
        OSTimeDly(OS_TICKS_PER_SEC * 5);
    }
}
void Task2(void *data)
{
    for (;;) {
        Print("---------------------------------------------2");
        OSTimeDly(OS_TICKS_PER_SEC * 4);
    }
}
void Task3(void *data)
{
    for (;;) {
        Print("----------------------------------3");
        OSTimeDly(OS_TICKS_PER_SEC * 3);
    }
}
void Task4(void *data)
{
    for (;;) {
        Print("------------------------4");
        OSTimeDly(OS_TICKS_PER_SEC * 2);
    }
}
void Task5(void *data)
{
    for (;;) {
        Print("--------------5");
        OSTimeDly(OS_TICKS_PER_SEC * 1);
    }
}
void Task6(void *data)
{
    for (;;) {
        Print("------6");
        OSTimeDly(OS_TICKS_PER_SEC / 2);
    }
}

void SetVecTable(void)
{
	INT8U	*src;
	INT8U	*dst;
	INT32U	len;
	
	src = (INT8U *)0x00000000;	// ROM
	dst = (INT8U *)0xfff00000;	// RAM
	len = 0x5000;
	
	/* Copy Vector from ROM to RAM, char by char */
	
	while (len--) {
		*dst++ = *src++;
	}
	
}

void SetLed(void)
{
	INT32U i;
	INT32U immr = 0x80000000;

	*(INT16U *)(immr + 0x952) &= 0x3fff;	//papar
	*(INT16U *)(immr + 0x950) |= 0xc000;	//padir
	
	while (1) {	
		i = 0;	
		
		*(INT16U *)(immr + 0x956) ^= 0xC000;
		
		while (i < 1000000) {
			i++;
		}
	}
}

/* copy CODE(.text) to RAM for Exeu faster */

extern INT8U __SOURCE[], __DESTINATION[], __DATA_END[];

#pragma section CODE ".startup"
void copy_to_ram(void)
{
	INT32U	i;
	INT32U	n;
	
	n = __DATA_END - __DESTINATION;
	
	for (i=0; i<n; i++) {
		__DESTINATION[i] = __SOURCE[i];	
	}
}