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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"><html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"><title>Procyon AVRlib: conf/encoderconf.h Source File</title><link href="dox.css" rel="stylesheet" type="text/css"></head><body><!-- Generated by Doxygen 1.3.6 --><div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="modules.html">Modules</a> | <a class="qindex" href="annotated.html">Data Structures</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="functions.html">Data Fields</a> | <a class="qindex" href="globals.html">Globals</a></div><h1>conf/encoderconf.h</h1><a href="encoderconf_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre>00001 <span class="comment">/*! \file encoderconf.h \brief Quadrature Encoder driver configuration. */</span>00002 <span class="comment">//*****************************************************************************</span>00003 <span class="comment">//</span>00004 <span class="comment">// File Name : 'encoderconf.h'</span>00005 <span class="comment">// Title : Quadrature Encoder driver configuration</span>00006 <span class="comment">// Author : Pascal Stang - Copyright (C) 2003-2004</span>00007 <span class="comment">// Created : 2003.01.26</span>00008 <span class="comment">// Revised : 2004.06.25</span>00009 <span class="comment">// Version : 0.2</span>00010 <span class="comment">// Target MCU : Atmel AVR Series</span>00011 <span class="comment">// Editor Tabs : 4</span>00012 <span class="comment">//</span>00013 <span class="comment">// The default number of encoders supported is 2 because most AVR processors</span>00014 <span class="comment">// have two external interrupts. To use more or fewer encoders, you must do</span>00015 <span class="comment">// four things:</span>00016 <span class="comment">//</span>00017 <span class="comment">// 1. Use a processor with at least as many external interrutps as number of</span>00018 <span class="comment">// encoders you want to have.</span>00019 <span class="comment">// 2. Set NUM_ENCODERS to the number of encoders you will use.</span>00020 <span class="comment">// 3. Comment/Uncomment the proper ENCx_SIGNAL defines for your encoders</span>00021 <span class="comment">// (the encoders must be used sequentially, 0 then 1 then 2 then 3)</span>00022 <span class="comment">// 4. Configure the various defines so that they match your processor and</span>00023 <span class="comment">// specific hardware. The notes below may help.</span>00024 <span class="comment">//</span>00025 <span class="comment">//</span>00026 <span class="comment">// -------------------- NOTES --------------------</span>00027 <span class="comment">// The external interrupt pins are mapped as follows on most AVR processors:</span>00028 <span class="comment">// (90s8515, mega161, mega163, mega323, mega16, mega32, etc)</span>00029 <span class="comment">//</span>00030 <span class="comment">// INT0 -> PD2 (PORTD, pin 2)</span>00031 <span class="comment">// INT1 -> PD3 (PORTD, pin 3)</span>00032 <span class="comment">//</span>00033 <span class="comment">// The external interrupt pins on the processors mega128 and mega64 are:</span>00034 <span class="comment">//</span>00035 <span class="comment">// INT0 -> PD0 (PORTD, pin 0)</span>00036 <span class="comment">// INT1 -> PD1 (PORTD, pin 1)</span>00037 <span class="comment">// INT2 -> PD2 (PORTD, pin 2)</span>00038 <span class="comment">// INT3 -> PD3 (PORTD, pin 3)</span>00039 <span class="comment">// INT4 -> PE4 (PORTE, pin 4)</span>00040 <span class="comment">// INT5 -> PE5 (PORTE, pin 5)</span>00041 <span class="comment">// INT6 -> PE6 (PORTE, pin 6)</span>00042 <span class="comment">// INT7 -> PE7 (PORTE, pin 7)</span>00043 <span class="comment">//</span>00044 <span class="comment">// This code is distributed under the GNU Public License</span>00045 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>00046 <span class="comment">//</span>00047 <span class="comment">//*****************************************************************************</span>00048 00049 <span class="preprocessor">#ifndef ENCODERCONF_H</span>00050 <span class="preprocessor"></span><span class="preprocessor">#define ENCODERCONF_H</span>00051 <span class="preprocessor"></span>00052 <span class="comment">// constants/macros/typdefs</span>00053 00054 <span class="comment">// defines for processor compatibility</span>00055 <span class="comment">// quick compatiblity for mega128, mega64 </span>00056 <span class="comment">//#ifndef MCUCR</span>00057 <span class="comment">// #define MCUCR EICRA</span>00058 <span class="comment">//#endif</span>00059 00060 <span class="comment">// Set the total number of encoders you wish to support</span>00061 <span class="preprocessor">#define NUM_ENCODERS 2</span>00062 <span class="preprocessor"></span>00063 00064 <span class="comment">// -------------------- Encoder 0 connections --------------------</span>00065 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>00066 <span class="comment">// *** NOTE: the choice of interrupt PORT, DDR, and PIN must match the external</span>00067 <span class="comment">// interrupt you are using on your processor. Consult the External Interrupts</span>00068 <span class="comment">// section of your processor's datasheet for more information.</span>00069 00070 <span class="comment">// Interrupt Configuration</span>00071 <span class="preprocessor">#define ENC0_SIGNAL SIG_INTERRUPT0 // Interrupt signal name</span>00072 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_INT INT0 // matching INTx bit in GIMSK/EIMSK</span>00073 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ICR MCUCR // matching Int. Config Register (MCUCR,EICRA/B)</span>00074 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ISCX0 ISC00 // matching Interrupt Sense Config bit0</span>00075 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_ISCX1 ISC01 // matching Interrupt Sense Config bit1</span>00076 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>00077 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00078 <span class="preprocessor">#define ENC0_PHASEA_PORT PORTD // PhaseA port register</span>00079 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_DDR DDRD // PhaseA port direction register</span>00080 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_PORTIN PIND // PhaseA port input register</span>00081 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEA_PIN PD2 // PhaseA port pin</span>00082 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>00083 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00084 <span class="preprocessor">#define ENC0_PHASEB_PORT PORTC // PhaseB port register</span>?? 快捷鍵說(shuō)明
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