00085 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_DDR             DDRC    // PhaseB port direction register</span>00086 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_PORTIN          PINC    // PhaseB port input register</span>00087 <span class="preprocessor"></span><span class="preprocessor">#define ENC0_PHASEB_PIN             PC0     // PhaseB port pin</span>00088 <span class="preprocessor"></span>00089 00090 <span class="comment">// -------------------- Encoder 1 connections --------------------</span>00091 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>00092 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>00093 <span class="comment">// interrupt you are using on your processor.  Consult the External Interrupts</span>00094 <span class="comment">// section of your processor's datasheet for more information.</span>00095 00096 <span class="comment">// Interrupt Configuration</span>00097 <span class="preprocessor">#define ENC1_SIGNAL                 SIG_INTERRUPT1  // Interrupt signal name</span>00098 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_INT                    INT1    // matching INTx bit in GIMSK/EIMSK</span>00099 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ICR                    MCUCR   // matching Int. Config Register (MCUCR,EICRA/B)</span>00100 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ISCX0                  ISC10   // matching Interrupt Sense Config bit0</span>00101 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_ISCX1                  ISC11   // matching Interrupt Sense Config bit1</span>00102 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>00103 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00104 <span class="preprocessor">#define ENC1_PHASEA_PORT            PORTD   // PhaseA port register</span>00105 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_PORTIN          PIND    // PhaseA port input register</span>00106 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_DDR             DDRD    // PhaseA port direction register</span>00107 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEA_PIN             PD3     // PhaseA port pin</span>00108 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>00109 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00110 <span class="preprocessor">#define ENC1_PHASEB_PORT            PORTC   // PhaseB port register</span>00111 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_DDR             DDRC    // PhaseB port direction register</span>00112 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_PORTIN          PINC    // PhaseB port input register</span>00113 <span class="preprocessor"></span><span class="preprocessor">#define ENC1_PHASEB_PIN             PC1     // PhaseB port pin</span>00114 <span class="preprocessor"></span>00115 00116 <span class="comment">// -------------------- Encoder 2 connections --------------------</span>00117 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>00118 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>00119 <span class="comment">// interrupt you are using on your processor.  Consult the External Interrupts</span>00120 <span class="comment">// section of your processor's datasheet for more information.</span>00121 00122 <span class="comment">// Interrupt Configuration</span>00123 <span class="comment">//#define ENC2_SIGNAL                   SIG_INTERRUPT6  // Interrupt signal name</span>00124 <span class="preprocessor">#define ENC2_INT                    INT6    // matching INTx bit in GIMSK/EIMSK</span>00125 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ICR                    EICRB   // matching Int. Config Register (MCUCR,EICRA/B)</span>00126 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ISCX0                  ISC60   // matching Interrupt Sense Config bit0</span>00127 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_ISCX1                  ISC61   // matching Interrupt Sense Config bit1</span>00128 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>00129 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00130 <span class="preprocessor">#define ENC2_PHASEA_PORT            PORTE   // PhaseA port register</span>00131 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_PORTIN          PINE    // PhaseA port input register</span>00132 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_DDR             DDRE    // PhaseA port direction register</span>00133 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEA_PIN             PE6     // PhaseA port pin</span>00134 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>00135 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00136 <span class="preprocessor">#define ENC2_PHASEB_PORT            PORTC   // PhaseB port register</span>00137 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_DDR             DDRC    // PhaseB port direction register</span>00138 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_PORTIN          PINC    // PhaseB port input register</span>00139 <span class="preprocessor"></span><span class="preprocessor">#define ENC2_PHASEB_PIN             PC2     // PhaseB port pin</span>00140 <span class="preprocessor"></span>00141 00142 <span class="comment">// -------------------- Encoder 3 connections --------------------</span>00143 <span class="comment">// Phase A quadrature encoder output should connect to this interrupt line:</span>00144 <span class="comment">// *** NOTE: the choice of interrupt pin and port must match the external</span>00145 <span class="comment">// interrupt you are using on your processor.  Consult the External Interrupts</span>00146 <span class="comment">// section of your processor's datasheet for more information.</span>00147 00148 <span class="comment">// Interrupt Configuration</span>00149 <span class="comment">//#define ENC3_SIGNAL                   SIG_INTERRUPT7  // Interrupt signal name</span>00150 <span class="preprocessor">#define ENC3_INT                    INT7    // matching INTx bit in GIMSK/EIMSK</span>00151 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ICR                    EICRB   // matching Int. Config Register (MCUCR,EICRA/B)</span>00152 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ISCX0                  ISC70   // matching Interrupt Sense Config bit0</span>00153 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_ISCX1                  ISC71   // matching Interrupt Sense Config bit1</span>00154 <span class="preprocessor"></span><span class="comment">// PhaseA Port/Pin Configuration</span>00155 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00156 <span class="preprocessor">#define ENC3_PHASEA_PORT            PORTE   // PhaseA port register</span>00157 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_PORTIN          PINE    // PhaseA port input register</span>00158 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_DDR             DDRE    // PhaseA port direction register</span>00159 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEA_PIN             PE7     // PhaseA port pin</span>00160 <span class="preprocessor"></span><span class="comment">// Phase B quadrature encoder output should connect to this direction line:</span>00161 <span class="comment">// *** PORTx, DDRx, PINx, and Pxn should all have the same letter for "x" ***</span>00162 <span class="preprocessor">#define ENC3_PHASEB_PORT            PORTC   // PhaseB port register</span>00163 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_DDR             DDRC    // PhaseB port direction register</span>00164 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_PORTIN          PINC    // PhaseB port input register</span>00165 <span class="preprocessor"></span><span class="preprocessor">#define ENC3_PHASEB_PIN             PC3     // PhaseB port pin</span>00166 <span class="preprocessor"></span>00167 <span class="preprocessor">#endif</span></pre></div><hr size="1"><address style="align: right;"><small>Generated on Fri Oct 15 03:50:21 2004 for Procyon AVRlib by<a href="http://www.doxygen.org/index.html"><img src="doxygen.png" alt="doxygen" align="middle" border=0 > </a>1.3.6 </small></address></body></html>