?? 1603_flash_list_20070816-micron_mlc_1plane.txt
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[FLASH_LIST]
// File:\\super\RD\SharedDocs\SKYMEDI\1603_Flash_Support_Spec
// Flash list definition
// Offset abbreviation value
//=================================================================================================================================================================================================
// 1st flash ID ( Manufacture ID )
// 2nd flash ID ( Device ID )
// 3rd flash ID
// 4th flash ID
// LA: 5th flash ID
// 0x00 BLK_MASK_H For formula Block Mask H Register ( 0x7010 ) in normal mode
// 0x01 BLK_MASK_M For formula Block Mask M Register ( 0x7011 ) in normal mode
// 0x02 PARTI_SHIFT For formula Parti Shift Register ( 0x7015 ) in normal mode
// 0x03 BLK_SHIFT For formula Block Shift Register ( 0x7017 ) in normal mode
// 0x04 PAGE_SHIFT For formula Page Shift Register ( 0x7018 ) in normal mode
// 0x05 ADDR_CYCLE Address Cycle Register ( 0x7019 )
// 0x06, 0x07 DEFECT_BLK The percentage of defective blocks per chip
// 0x08 SCAN_MODE The scan flash mode 0 : check 0, 2047 byte of 1st, 2nd and last page of each block, 1 : check whole page data of 1st, 2nd and last page, 2: check whole block data
// 0x09 FSH_CFG Flash Cfg Register ( 0x701A )
// 0x0A FSH_WR_CTRL Flash Write Control Register ( 0x701B )
// 0x0B FSH_RD_CTRL Flash Read Control Register ( 0x701C )
// 0x0C FSH_RD_CTRL2 Flash Read Control 2 Register ( 0x701D )
// 0x0D FSH_ALE_CLE_CTRL Flash ALE/CLE Control Register ( 0x701E )
// 0x0E FSH_CTRL0 Flash Control0 Register ( 0x701F )
// 0x0F FSH_CTRL1 Flash Control1 Register ( 0x7020 )
// 0x10 FSH_CTRL2 Flash Control2 Register ( 0x7021 )
// 0x11 FSH_CTRL3 Flash Control3 Register ( 0x7022 )
// 0x12 FSH_DEFECT Flash Defect Register ( 0x70D7 )
// 0x13 MP_FACTOR MP Factor Register ( 0x7012 )
// 0x14 BANK_SHIFT Bank Shift Register ( 0x7017)
// 0x15 DIE_FACTOR Die Factor Register ( 0x7013 )
// 0x16 CHIP_FACTOR Chip Factor Register ( 0x7014 )
// 0x17 FSH_CTRL4 Flash Control4 Register ( 0x7023 )
// 0x18 See the Summary below:
// bit0 ~ bit1: No of R Blks (0 -> 1 R Blk, 1 -> 2 R Blks, 2 -> 3 R Blks, 3 -> No R Blks)
// bit2: Even and Odd Pages Copy Back restriction (0 -> Have restriction, 1 -> No restriction)
// bit3: Reset First before flash command
// 0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 14 15 16 17 18 OSC tWC tRC VCC Spec
MT29F4G08MAA 0x2C 0xDC 0xFF 0x25 0xFF 0x00 0x07 0x02 0x0B 0x07 0x12 0x00 0x28 0x00 0x32 0x52 0x93 0x0B 0x03 0x10 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
MT29F4G16MAA 0x2C 0xCC 0xFF 0x65 0xFF 0x00 0x07 0x02 0x0B 0x07 0x12 0x00 0x28 0x00 0x72 0x52 0x93 0x0B 0x03 0x30 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
MT29F8G08NAA 0x2C 0xD3 0xFF 0x25 0xFF 0x00 0x0F 0x02 0x0C 0x07 0x12 0x00 0x28 0x00 0x32 0x52 0x93 0x0B 0x03 0x10 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
MT29F8G16NAA 0x2C 0xC3 0xFF 0x65 0xFF 0x00 0x0F 0x02 0x0C 0x07 0x12 0x00 0x28 0x00 0x72 0x52 0x93 0x0B 0x03 0x30 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
MT29F8G08TAA 0x2C 0xD3 0xFF 0x25 0xFF 0x00 0x0F 0x02 0x0C 0x07 0x12 0x00 0x28 0x00 0x32 0x52 0x93 0x0B 0x03 0x10 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
MT29F8G16TAA 0x2C 0xC3 0xFF 0x65 0xFF 0x00 0x0F 0x02 0x0C 0x07 0x12 0x00 0x28 0x00 0x72 0x52 0x93 0x0B 0x03 0x30 0x2F 0x81 0x04 0x00 0x00 0x00 0x00 0x00 0x22 0x9A // 35M 50 50 33 10,2005 ver0.2
[SD_CID]
// (A) SD 2.0/SD 1.xx
1F 53 4B 4D 4D 43 20 34 30 10 00 00 00 01 87 75
[MMC_CID]
// (B) MMC 4.0/MMC 3.x
44 12 34 4D 4D 43 20 34 30 10 00 00 00 01 67 75
[SD_CSD]
// 2GB
// (A) SD 2.0/SD 1.xx, 2F: Large/AG-AND/Small/Multi-Plane
// 00 3F 01 32 5F 5A 80 00 36 D8 5F FF 9E 40 00 75
// (B) SD 1.01, 2F:Large/AG-AND/Small/Multi-Plane
// 00 3F 01 32 1F 5A 80 00 36 D8 5F FF 9E 40 00 75
// Under 2GB
// (C) SD 2.0/SD 1.xx, 2F: Large/AG-AND/Small/Multi-Plane
00 3F 01 32 5F 59 80 00 36 D8 5F FF 9E 40 00 75
// (D) SD 1.01, 2F:Large/AG-AND/Small/Multi-Plane
// 00 3F 01 32 1F 59 80 00 36 D8 5F FF 9E 40 00 75
[MMC_CSD]
// 2GB
// (A) MMC 4.0, 2F: Large/Small/Multi-Plane
// 90 3F 01 2A 0F 5A 80 00 36 D8 7F E3 9E 40 00 75
// (B) MMC 3.x, 2F: Large/Small/Multi-Plane
// 8C 3F 01 2A 0F 5A 80 00 36 D8 7F E3 9E 40 00 75
// (C) MMC 4.0, 3F: AG-AND
// 90 3F 01 2A 0F 5A 80 00 36 D8 7F E3 9E 40 00 75
// (D) MMC 3.x, 3F: AG-AND
// 8C 3F 01 2A 0F 5A 80 00 36 D8 7F E3 9E 40 00 75
// Under 2GB
// (A) MMC 4.0, 2F: Large/Small/Multi-Plane
90 3F 01 2A 0F 59 80 00 36 D8 7F E3 9E 40 00 75
// (B) MMC 3.x, 2F: Large/Small/Multi-Plane
// 8C 3F 01 2A 0F 59 80 00 36 D8 7F E3 9E 40 00 75
// (C) MMC 4.0, 3F: AG-AND
// 90 3F 01 2A 0F 59 80 00 36 D8 7F E3 9E 40 00 75
// (D) MMC 3.x, 3F: AG-AND
// 8C 3F 01 2A 0F 59 80 00 36 D8 7F E3 9E 40 00 75
[SD_COMP_PARAS]
// (A) SD 2.0/SD 1.xx, OSC : 58MHZ/2
76 B8 B3 61 39 2D B8 80 FF 00 00 00 00 00 31 38 76 A0 B1 61 39 2D B8 80 3B 23 28 00 6D 31 7F 5A
// (B) SD 2.0/SD 1.xx, OSC : 29M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 19 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
// (C) SD 2.0/SD 1.xx, OSC : 25M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 11 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
// (D) SD 2.0/SD 1.xx, OSC : 21M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 09 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
[MMC_COMP_PARAS]
// (A) MMC 4.0/MMC 3.x, OSC : 58MHZ/2
76 B8 B3 61 39 2D B8 80 FF 00 00 00 00 00 31 38 76 A0 B2 63 3A 2F B8 89 3B 23 00 00 DA 31 7F 5A
// (B) MMC 4.0/MMC 3.x, OSC : 29M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 19 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
// (C) MMC 4.0/MMC 3.x, OSC : 25M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 11 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
// (D) MMC 4.0/MMC 3.x, OSC : 21M
//70 B8 B3 61 39 2B B8 80 FF 00 00 00 00 00 09 0F 70 A0 B1 60 38 29 B8 80 BB B3 00 00 00 00 7F 5A
[VERSION]
04 09
[MMC_EXT_CSD]
00 00 00 00 00 00 0A 00 00 00 00 00 00 03 00 03 00 00 00 66 66 66 66 00 00 00 00 00 00 00 00 00
[SD_EXT_CSD]
00 00 00 00 00 00 0A 00 00 00 00 00 00 03 00 03 00 00 00 66 66 66 66 00 00 00 00 00 00 00 00 00
[MULPAGE_WRITE_CMD_SET]
80 10 10 00 85 70 10 00 DC 11
[MULPAGE_READ_CMD_SET]
00 30 00 E0 05 70 00 00 6E 10
[MULPAGE_CB_CMD_SET]
00 10 10 00 00 00 35 00 FC 15
[MULBLOCK_ERASE_CMD_SET]
60 D0 00 00 00 70 00 00 0C 20
[SD_SCR]
// (A) SD 2.0/SD 1.x
01 25 00 00 00 00 00 00
// (B) SD 1.01
//00 25 00 00 00 00 00 00
[SD_SIZE_OF_PROTECTED_AREA]
// card density is less than 1GB(< 1GB)
00 00 00 28
// card density is larger than or equal to 1GB(>= 1GB)
//00 00 00 30 // AG-AND
//00 00 00 50 // Others ?? 快捷鍵說明
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