/*This is the include file is for Lattice's ispVME(tm) (ispVM(tm) Embedded)*/
/*It is to be compiled with SVF2VME file compiler*/
/*It is to be compiled with the VME2HEX utility*/

/*The maximum byte size per VME HEX file*/
#define VMEHEXMAX   60000L  /*the VME file is splitted by 60K bytes per file*/

/*The maximum bits size per single scan burst*/
#define SCANMAX     60000L  /*the maximum single scan burst is 60K bits*/

#define SETDATATYPE   0x21       /*set the data type register*/
#define RESETDATATYPE 0x22       /*clear the data type register*/

#define SHR           0x23       /*set the flow control register for right shift*/
#define SHL           0x24       /*set the flow control register for left shift*/



/*support some sort of debugging, if the debug flag is set, then all comments
  in the vme file are printed whenever it is encountered*/
#define COMMENTS      0x50    /*following is the comment*/
                              /*example: COMMENTS 4 "FAIL" CONTINUE*/
#define VMPRINT       0x51    /*print the comment follows*/
                              /*example: print the message if pass*/
                              /*         VMPRINT PASS; */
                              /*print the message if fail*/
                              /*         VMPRINT FAIL;*/

/*To support function call for the purpose of launching a specifc operation*/
#define FUNC       0x40       /*the opcode define the beginning of the function*/
                              /*example: FUNC READ_ID is the beginning of function
                                         0x0002*/
#define ENDFUNC    0x41       /*the end of the function*/
                              /*example: ENDFUNC 0 is the end of function 0*/

/*opcode to better define the file format*/
#define CONTINUE      0x70       /*allow continuation of the program*/
                                 /*SDR 32 XTDI XTDO CONTINUE*/
#define ENDVME        0x7F       /*the end of the VME program*/
#define ENDFILE       0xFF       /*the end of the file is reached*/

/*to support data array direct or indirect access*/
/* for TDIARRAY,TDOARRAY,MASK ARRAY, XTDIARRAY, XTDARRAY support*/
/* example:   SDR 32 TDIARRAY ROMARRAY CONTINUE;
              SDR 32 TDIARRAY CPYDATAARRAY 0 CONTINUE;
*/

/*if the data follows has compression, then add 0x80 to the opcode shown*/

#define LOCAL         0x00     /*the data follows immediately*/
#define SHRLOCAL      0x01     /*shift right the data follows immediately*/
#define SHLLOCAL      0x02     /*shift left the data follows immediately*/
#define ROMARRAY      0x03     /*from read only array follows*/
#define RAMARRAY      0x04     /*from a read and write array*/
#define CPYDATARRAY   0x05     /*copy to data array*/
#define CPYDATAVAR    0x06     /*copy to data variable*/ 
#define SHLARRAY      0x07     /*from data array with shift left operation*/
#define SHRARRAY      0x08     /*from data array with shift right operation*/
#define INVARRAY      0x09     /*from data array with complement operation*/
#define INCDATA       0x0A     /*from variable array with increment operation*/ 
#define DECDATA       0x0B     /*from variable array with decement operation*/  
#define INVDATA       0x0C     /*from variable array with complement operation*/ 
#define SHLDATA       0x0D     /*from variable array with shift left operation*/
#define SHRDATA       0x0E     /*from varaible array with shift right operation*/ 

   
   
/*All possible JTAG TAP state transistion supported*/
#define RESET      0x00    /*Traverse to TLR*/                
#define IDLE       0x01    /*Traverse to RTI*/
#define IRPAUSE    0x02    /*Traverse to PAUSE IR*/               
#define DRPAUSE    0x03    /*Traverse to PAUSE DR*/               
#define SHIFTIR    0x04    /*Traverse to SHIFT IR*/
#define SHIFTDR    0x05    /*Traverse to SHIFT DR*/
/*Token For ISP Devices*/
#define iIDLE      0x06    /*Traverse to IDLE state (Read ID)*/
#define iSHIFT     0x07    /*Traverse to SHIFT state (Shift Instruction)*/
#define iEXEC      0x08    /*Traverse to EXECUTE state 
                             (excute the instruction)*/


/* The FlowControl Register bits definition */
#define LSC_STATE  0x0001    /*set flow to that LSC classic*/
#define CASCADE    0x0002    /*Set SDR splitting*/
#define NOOP       0x0010    /*Nullify the current action*/
#define GO_NOGO    0x0004    /*Set Pass if fail*/
#define REPEATLOOP 0x0008    /*Set repeat loop in session flag*/
#define SHIFTRIGHT 0x0080    /*the next stream needs a right shift*/
#define SHIFTLEFT  0x0100    /*the next stream needs a left shift*/ 
#define VERIFYUES  0x0200    /* Continue If Fail */

/* The DataType Register bits definition */
#define EXPRESS    0x0001    /*Data type is simultaneous in and out.*/
#define SIR_DATA   0x0002    /*SIR keyword*/
#define SDR_DATA   0x0004    /*SDR keyword*/
#define COMPRESS   0x0008    /*Data is compressed*/
#define TDI_DATA   0x0010    /*TDI data exist*/
#define TDO_DATA   0x0020    /*TDO data exist*/
#define MASK_DATA  0x0040    /*MASK data exist*/
#define HEAP_IN    0x0080    /*data is from HEAP memory*/
#define HEAP_OUT   0x0100    /*data is out to HEAP*/
#define ARRAY      0x0200    /*data is from ARRAY*/
#define VARIABLE   0x0400    /*data is from a declared variable*/
#define CRC_DATA   0x0800	 /*CRC data exist*/
#define CMASK_DATA 0x1000    /*CMASK data exist*/
#define RMASK_DATA 0x2000	 /*RMASK data exist*/
#define READ_DATA  0x4000    /*READ data exist*/

/* 05/27/03 Nguyen added to support Dynamic IO */
#define DMASK_DATA 0x8000	 /*DMASK data exist*/

/* opcode for discrete pin toggling for ISP devices for discharge*/
/* Howard Tang 4/13/2000 Added to support ISP devices*/
#define signalENABLE  0x1C    /*assert the ispEN pin*/
#define signalTMS     0x1D    /*assert the MODE or TMS pin*/
#define signalTCK     0x1E    /*assert the SCLK or TCK pin*/
#define signalTDI     0x1F    /*assert the SDI or TDI pin*/
#define signalTRST    0x20    /*assert the RESET or TRST pin*/   

/* Vendor */
#define VENDOR		0x56
#define LATTICE		0x01
#define ALTERA		0x02
#define XILINX		0x03

/* OPCODE Definitions */
/* Important!  Opcodes must be unique */
#define ENDDATA    0x00    /*the end of the current SDR data stream*/
#define RUNTEST    0x01    /*the duration to stay at the stable state*/
#define ENDDR      0x02    /*the stable state after SDR*/                 
#define ENDIR      0x03    /*the stable state after SIR*/                 
#define ENDSTATE   0x04    /*the stable state after RUNTEST*/                 
#define TRST       0x05    /*assert the TRST pin*/                 
#define HIR        0x06    /*the sum of IR bits of devices at lead*/
#define TIR        0x07    /*the sum of IR bits of devices at the end*/
#define HDR        0x08    /*the number of devices at lead*/                 
#define TDR        0x09    /*the number of devices at end*/                 
#define ispEN      0x0A    /*assert the ispEN pin, assert buffer if exist*/
#define FREQUENCY  0x0B    /*the max. clock rate to run the state machine*/
#define STATE      0x10    /*move to next stable state*/                 
#define SIR        0x11    /*the instruction stream follows*/                 
#define SDR        0x12    /*the data stream follows*/                 
#define TDI        0x13    /*the data stream follows feed into devices*/
#define TDO        0x14    /*the data stream follows to be read and compare*/
#define MASK       0x15    /*the data stream follows is the output mask*/
#define XSDR       0x16    /*the data stream follows is for simultaneous 
                             shifting in and out*/
#define XTDI       0x17    /*the data stream follows is for shift in only,
                             it must be stored for verifying on the next
                             XSDR call.*/
#define XTDO       0x18    /*there is no data stream follows, get it from
                             stream stored up by the previous XTDI token*/
#define MEM        0x19    /*the size of memory need to allocate, isp2hex.exe
                             remove this token and replace by an array
                             declaration.*/
#define WAIT       0x1A    /*the duration of delay at IDLE state*/
#define TCK        0x1B    /*clock pulses to TCK*/
#define HEAP       0x32       /*the memory size needed to hold the loop*/
#define REPEAT     0x33       /*the beginning of looping*/
#define LEFTPAREN  0x35       /*the beginning of data following loop*/
#define VAR		   0x55		  /*place holder for data*/
#define SEC        0x1C    /*the absolute time in seconds must wait for*/              
#define SMASK      0x1D    /*the MASK for TDI data*/               
#define MAX        0x1E    /*the absolute maximum wait time*/
#define ON         0x1F    /*assert the targeted pin*/
#define OFF        0x20    /*deassert the targeted pin*/
#define SETFLOW    0x30    /*change Flow Control Register*/
#define RESETFLOW  0x31    /*clear the Flow Control Register*/
#define CRC		   0x47      /*the bits inlcuded in CRC calculation*/
#define CMASK	   0x48		/*the bits included in CRC calculation*/
#define RMASK      0x49      /*the bits included in Read and Save*/
#define READ	   0x50      /*the bits included in Read and Save*/
#define ENDLOOP    0x59       /*the end of the repeat loop*/
#define SECUREHEAP 0x60       /*byte encoded before HEAP to ensure*/
#define VUES       0x61		/* Opcode to support Continue If Fail */

/* 06/03/03 Nguyen added to support Dynamic IO */
#define DMASK      0x62    /*the MASK for IO*/