?? badge4.h
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/*
* badge4.h: Badge4 specific defines
*
* Copyright (C) 2001 Hewlett-Packard Company
* Written by Christopher Hoover <ch@hpl.hp.com>
*
* $Id: badge4.h,v 1.1 2001/12/27 18:27:37 erikm Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ident "$Id: badge4.h,v 1.1 2001/12/27 18:27:37 erikm Exp $"
#ifndef BLOB_ARCH_BADGE4_H
#define BLOB_ARCH_BADGE4_H
/* boot CPU speed */
#define CPU_SPEED (0x0a)
/* serial port */
#define USE_SERIAL3
/* GPIO for the LED */
#define LED_GPIO (0x00000000) /* No LED */
/* the base address were BLOB is loaded by the first stage loader */
#define BLOB_ABS_BASE_ADDR (0xc0200400)
/* where do various parts live in RAM */
#define BLOB_RAM_BASE (0xc0100000)
#define KERNEL_RAM_BASE (0xC0008000)
#define PARAM_RAM_BASE (0xc0110000)
#define RAMDISK_RAM_BASE (0xC0400000)
/* and where do they live in flash */
#define BLOB_FLASH_BASE (0x00000000)
#define BLOB_FLASH_LEN (0x0000A000)
#define PARAM_FLASH_BASE (BLOB_FLASH_BASE + BLOB_FLASH_LEN)
#define PARAM_FLASH_LEN (0x00006000)
#define KERNEL_FLASH_BASE (PARAM_FLASH_BASE + PARAM_FLASH_LEN)
#define KERNEL_FLASH_LEN (1 * 1024 * 1024)
#define RAMDISK_FLASH_BASE (KERNEL_FLASH_BASE + KERNEL_FLASH_LEN)
#define RAMDISK_FLASH_LEN (4 * 1024 * 1024 - KERNEL_FLASH_LEN - PARAM_FLASH_LEN - BLOB_FLASH_LEN)
#define PARAM_START PARAM_FLASH_BASE
/* the position of the kernel boot parameters */
#define BOOT_PARAMS (0xc0000100)
/* the size (in kbytes) to which the compressed ramdisk expands */
#define RAMDISK_SIZE (8 * 1024)
/* Memory configuration */
#define BADGE4_MDCNFG \
(MDCNFG_BANK0_ENABLE|MDCNFG_DTIM0_SDRAM|MDCNFG_DWID0_32B|MDCNFG_DRAC0(3)|MDCNFG_TRP0(4)|MDCNFG_TDL0(3)|MDCNFG_TWR0(3)) /* was 0x0000f435 */
/* On CS0: Intel TE28F320C3BA100 Advanced+ Boot Block Flash (4MB) */
#define BADGE4_CS0 \
(MSC_RT_ROMFLASH|MSC_RBW16|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7))
/* On CS1: 2 x Toshbia TC55V400 FT-85 (SRAM 256K x 16 bit) [1MB total] */
#define BADGE4_CS1 \
(MSC_RT_SRAM_012|MSC_RBW32|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7))
/* On CS2: 2 x Toshbia TC55V400 FT-85 (SRAM 256K x 16 bit) [1MB total] */
#define BADGE4_CS2 \
(MSC_RT_SRAM_012|MSC_RBW32|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7))
/* On CS3: Nothing */
#define BADGE4_CS3 0
/* On CS4: Nothing */
#define BADGE4_CS4 0
/* On CS5: SA-1111 */
#define BADGE4_CS5 \
(MSC_RT_VARLAT_345|MSC_RBW16|MSC_RDF(31)|MSC_RDN(31)|MSC_RRR(7))
#define BADGE4_MSC0 (BADGE4_CS0 | (BADGE4_CS1<<16)) /* was: 0xfff9fffc */
#define BADGE4_MSC1 (BADGE4_CS2 | (BADGE4_CS3<<16)) /* was: 0x0000fff9 */
#define BADGE4_MSC2 (BADGE4_CS4 | (BADGE4_CS5<<16)) /* was: 0xfff90000 */
#ifdef BLOB_NEED_MEMCONFIG
# define MDCNFG_VALUE BADGE4_MDCNFG /* 0x0 MDCNFG */
# define MDCAS00_VALUE 0xAAAAAAA7 /* 0x04 MDCAS00 */
# define MDCAS01_VALUE 0xAAAAAAAA /* 0x08 MDCAS01 */
# define MDCAS02_VALUE 0xAAAAAAAA /* 0x0c MDCAS02 */
# define MSC0_VALUE BADGE4_MSC0 /* 0x10 MSC0 */
# define MSC1_VALUE BADGE4_MSC1 /* 0x14 MSC1 */
# define MECR_VALUE 0x994a994a /* 0x18 MECR */
# define MDREFR_VALUE DO_NOT_USE_THIS_VALUE__GETS_AUTOMAGICALLY_COMPUTED
# define MDCAS20_VALUE 0xAAAAAA7F /* 0x20 MDCAS20 */
# define MDCAS21_VALUE 0xAAAAAAAA /* 0x24 MDCAS21 */
# define MDCAS22_VALUE 0xAAAAAAAA /* 0x28 MDCAS22 */
# define MSC2_VALUE BADGE4_MSC2 /* 0x2C MSC2 */
# define SMCNFG_VALUE 0x00000000 /* 0x30 SMCNFG */
#endif
#endif
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