?? uart_413_3.c
字號:
//定義了兩個串口,由于使用了Timer_A的CCR1和CCR2,所以接收
//固定為P1.2和P2.0,發射可以根據情況選用其他I/O口,默認情況為
//P1.2,P1.6為一對,P2.0,P1.7為一對,如果發射不是P1.6或1.7,可以
//修改TX1_OUT_CTL,TX1_DIR_CTL或TX2_OUT_CTL,TX2_DIR_CTL,以及
//TXD_1,TXD_2.
//兩個串口每次只能用一個,采用接收完一幀再發出去,如果字節之間
//超過10個波特,即認為一幀完成.
//接收緩存默認為200個字節,可以根據RAM的使用情況來確定大小.
//ZhaoZhendong
//Lierda, Inc
//April 2003
#include <msp430x41x.h>
#define TX1_OUT_CTL P1OUT
#define TX1_DIR_CTL P1DIR
#define TX2_OUT_CTL P1OUT
#define TX2_DIR_CTL P1DIR
#define RX1_SEL_CTL P1SEL
#define RX1_DIR_CTL P1DIR
#define RX2_SEL_CTL P2SEL
#define RX2_DIR_CTL P2DIR
#define TXD_1 0x40
#define TXD_2 0x80
#define RXD_1 0x04
#define RXD_2 0x01
#define Bitime_5 0x07
#define Bitime 0x0E
#define TA_DELAY 0x8C
unsigned int RXTXData_1;
unsigned char BitCnt_1;
unsigned char RX_1_FLAG;
unsigned char TA2=0;
unsigned int RXTXData_2;
unsigned char BitCnt_2;
unsigned char RX_2_FLAG;
unsigned char TA1=0;
unsigned char CHANNEL=0;
unsigned char RX_FINISH_FLAG=1;
unsigned char UART_BUF_POINTER=0;
unsigned char UART_BUF[200];
void TX_0_Byte (unsigned rxtx);
void RX_0_Ready (void);
void TX_1_Byte (unsigned rxtx);
void RX_1_Ready (void);
void TX_2_Byte (unsigned rxtx);
void RX_2_Ready (void);
void main (void)
{
int i;
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
SCFI0 |= FN_4; // x2 DCO frequency, 8MHz nominal
FLL_CTL0 |= DCOPLUS + XCAP14PF; // DCO+, Configure load caps
SCFQCTL = 121; // (121+1) x 32768 x 2 = 7.99 Mhz
_EINT();
TX1_OUT_CTL |= TXD_1;
TX2_OUT_CTL |= TXD_2;
TACTL = TASSEL0+MC1;
RX1_SEL_CTL |= RXD_1;
RX2_SEL_CTL |= RXD_2;
TX1_DIR_CTL |= TXD_1;
TX2_DIR_CTL |= TXD_2;
RX_1_Ready();
RX_2_Ready();
_EINT();
//***********************Mainloop************************************
for (;;)
{
RX_1_Ready();
RX_2_Ready();
while(RX_FINISH_FLAG)
{
LPM3;
if(RX_FINISH_FLAG)
{switch(CHANNEL)
{
case 2: {
UART_BUF[UART_BUF_POINTER]=RXTXData_1;
UART_BUF_POINTER++;
RX_1_Ready();
}break;
case 4: {
UART_BUF[UART_BUF_POINTER]=RXTXData_2;
UART_BUF_POINTER++;
RX_2_Ready();
}break;
}
}
}
RX_FINISH_FLAG=1;
switch(CHANNEL)
{
case 2: {
for(i=0;i<UART_BUF_POINTER;i++)
TX_1_Byte(UART_BUF[i]);
UART_BUF_POINTER=0;
}break;
case 4: {
for(i=0;i<UART_BUF_POINTER;i++)
TX_2_Byte(UART_BUF[i]);
UART_BUF_POINTER=0;
}break;
}
CHANNEL=0;
}
}
//*************************Mainloop*************************************
void TX_1_Byte (unsigned rxtx)
{
RX_1_FLAG=0;
RXTXData_1=rxtx;
BitCnt_1 = 0xA; // Load Bit counter, 8data + ST/SP
CCR1 = TAR; // Current state of TA counter
CCR1 += Bitime;
RXTXData_1 |= 0x100; // Add mark stop bit to RXTXData
RXTXData_1 = RXTXData_1 << 1; // Add space start bit
CCTL1 = CCIE;
TX1_OUT_CTL |= TXD_1;
LPM3;
}
void TX_2_Byte (unsigned rxtx)
{
RX_2_FLAG=0;
RXTXData_2=rxtx;
BitCnt_2 = 0xA; // Load Bit counter, 8data + ST/SP
CCR2 = TAR; // Current state of TA counter
CCR2 += Bitime;
RXTXData_2 |= 0x100; // Add mark stop bit to RXTXData
RXTXData_2 = RXTXData_2 << 1; // Add space start bit
CCTL2 = CCIE; // TXD = mark = idle
TX2_OUT_CTL |= TXD_2;
LPM3;
}
void RX_1_Ready (void)
{
BitCnt_1 = 0x8; // Load Bit counter
CCTL1 = SCS+OUTMOD0+CM1+CAP+CCIE; // Sync, Neg Edge, Capture
RX_1_FLAG=1;
}
void RX_2_Ready (void)
{
BitCnt_2 = 0x8; // Load Bit counter
CCTL2 = SCS+OUTMOD0+CM1+CAP+CCIE; // Sync, Neg Edge, Capture
RX_2_FLAG=1;
}
interrupt[TIMERA1_VECTOR] void Timer_A_1 (void)
{
switch(TAIV)
{
case 2:{
TACCTL2 &= ~CCIE;
switch(TA1)
{
case 0:{
switch(RX_1_FLAG)
{
case 0:{
CCR1 += Bitime;
switch(BitCnt_1 == 0)
{
case 0:{
if (RXTXData_1 & 0x01)
TX1_OUT_CTL |= TXD_1;
else
TX1_OUT_CTL &= ~TXD_1;
RXTXData_1 = RXTXData_1 >> 1;
BitCnt_1 --;
}break;
case 1:{CCTL1 &= ~ CCIE;
LPM3_EXIT;
}break;
}
}break;
case 1:{
CCR1 += Bitime;
switch((CCTL1 & CAP)==CAP)
{
case 0:{RXTXData_1 = RXTXData_1 >> 1;
if (CCTL1 & SCCI)
RXTXData_1 |= 0x80;
BitCnt_1 --;
if ( BitCnt_1 == 0)
{
CCTL1 &= ~ CCIE;
//************************************************************
TACCR2=TAR+TA_DELAY;
TACCTL2 = CCIE;
TA2=1;
//*************************************************************
LPM3_EXIT;
}
}break;
case 1:{
CCTL1 &= ~ CAP;
CCR1 += Bitime_5;
CCTL2 &= ~CCIE;
CHANNEL=0x02;
}break;
}
}break;
}
}break;
case 1:{
RX_FINISH_FLAG=0;
TACCTL1 &= ~CCIE;
TA1=0;
LPM3_EXIT;
}break;
}
}break;
case 4:{
TACCTL1 &= ~CCIE;
switch(TA2)
{
case 0:{
switch(RX_2_FLAG)
{
case 0:{
CCR2 += Bitime;
switch(BitCnt_2 == 0)
{
case 0:{
if (RXTXData_2 & 0x01)
TX2_OUT_CTL |= TXD_2;
else
TX2_OUT_CTL &= ~TXD_2;
RXTXData_2 = RXTXData_2 >> 1;
BitCnt_2 --;
}break;
case 1:{CCTL2 &= ~ CCIE;
LPM3_EXIT;
}break;
}
}break;
case 1:{
CCR2 += Bitime;
switch((CCTL2 & CAP)==CAP)
{
case 0:{RXTXData_2 = RXTXData_2 >> 1;
if (CCTL2 & SCCI)
RXTXData_2 |= 0x80;
BitCnt_2 --;
if ( BitCnt_2 == 0)
{
CCTL2 &= ~ CCIE;
//*************************************************************
TACCR1=TAR+TA_DELAY;
TACCTL1 = CCIE;
TA1=1;
//*****************************************************************
LPM3_EXIT;
}
}break;
case 1:{
CCTL2 &= ~ CAP;
CCR2 += Bitime_5;
CCTL1 &= ~CCIE;
CHANNEL=0x04;
}break;
}
}break;
}
}break;
case 1:{
RX_FINISH_FLAG=0;
TACCTL2 &= ~CCIE;
TA2=0;
LPM3_EXIT;
}break;
}
}break;
default:break;
}
}
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