/*
 * file: bsetest.c
 *
 * Barnett Systems Engineering UCOS-II PowerPC Port Test Code
 * This is demo code to exercise the UCOS-II PowerPC port
 * The task counters increment at different rates to show the 
 * OS is working.
 * Some non-essential code is MPC8xxFADS specific.
 * Remove for a different target.
 *
 * Functions:
 * int main (void)
 * void T_zzz(void *data); 
 * void T_Smc1_Xmit(void *data); 
 * void T_Smc1_Recv(void *data); 
 * void T_Console(void *data); 
 * void ticker_start (INT32S ticks_per_second);
 *
 * Author: Harry E. Barnett	11/11/99
 * harryb@hbbse.com http://www.hbbse.com
 *
 * Version V1.00
 *
 */

#define GLOBAL_DEFINE		/* Define globals in this file */ 

#include "includes.h"

/* Function prototypes */ 
void T_Console(void *data);
void T_Smc1_Xmit(void *data);
void T_Smc1_Recv(void *data);
void T_zzz(void *data);
void ticker_start (INT32S ticks_per_sec);

/* Defines */ 
/* Priorities */ 
enum t_prio { SMC1_XMIT_PRIO = 2, SMC1_RECV_PRIO, CONSOLE_PRIO, ZZZ_PRIO };

#define	TASK_STK_SIZE     2048 
#define T_DELAY		1
/*
 * Note: IMMR_BASE is target specific. Change this value to match the base
 * of the memory-mapped registers on your target
 */ 
#define IMMR_BASE	0xFF000000

/* Globals */ 
INT32S	ctrT_zzz;
INT32S	ctrT_Smc1_Xmit;
INT32S	ctrT_Smc1_Recv;
INT32S	ctrT_Console;

OS_STK			T_ConsoleStk[TASK_STK_SIZE];
OS_STK			T_Smc1_RecvStk[TASK_STK_SIZE];
OS_STK			T_Smc1_XmitStk[TASK_STK_SIZE];
OS_STK			T_zzzStk[TASK_STK_SIZE];

INT8U			T_ConsoleData;
INT8U			T_Smc1_RecvData;
INT8U			T_Smc1_XmitData;
INT8U			T_zzzData;

volatile INT32U * bcsr4;
extern void DECIntr (void);

/********* main () ****************/ 

int main (void)
{
	INT32S	idx;

	/* Initialize BCSR4 pointer */ 
	/* MPC8xxFADS specific. */ 
	bcsr4 = (INT32U *) 0x02100010;

	T_zzzData = T_Smc1_XmitData = T_Smc1_RecvData = T_ConsoleData = 0;

	for (idx = 0; idx < TASK_STK_SIZE + 0x10; idx++)
	{
		T_Smc1_RecvStk[idx] = 0xE0E1E2E3;
		T_Smc1_XmitStk[idx] = 0xE0E1E2E3;
		T_zzzStk[idx] = 0xE0E1E2E3;
		T_ConsoleStk[idx] = 0xE0E1E2E3;
	}

	/*
	 * A couple of brute force interrupt installers.
	 * They assume that the base of the exception table is 0 
	 * If it is not, the target addresses must be changed to
	 * 0xFFF00900 and 0xFFF00C00 respectively.
	 */ 
	*((INT32U *) 0x900) = ((INT32U) DECIntr - 0x900) | 0x48000000;
	*((INT32U *) 0xC00) = ((INT32U) OSCtxSw - 0xC00) | 0x48000000;

	OSInit ();

	OSTaskCreate (	T_zzz,
					(void *)&T_zzzData,
					(void *)&T_zzzStk[TASK_STK_SIZE],
					ZZZ_PRIO);

	OSTaskCreate (	T_Smc1_Xmit,
					(void *)&T_Smc1_XmitData,
					(void *)&T_Smc1_XmitStk[TASK_STK_SIZE],
					SMC1_XMIT_PRIO);

	OSTaskCreate (	T_Smc1_Recv,
					(void *)&T_Smc1_RecvData,
					(void *)&T_Smc1_RecvStk[TASK_STK_SIZE],
					SMC1_RECV_PRIO);

	OSTaskCreate (	T_Console,
					(void *)&T_ConsoleData,
					(void *)&T_ConsoleStk[TASK_STK_SIZE],
					CONSOLE_PRIO);

	OSStart();
	/* No, it never returns... */ 
}

void T_zzz (void * data)
{
	ctrT_zzz = 0;

	OSStatInit ();

	for(;;)
	{
		/*
		 * Toggle the signal lamp on the FADS board
		 * so it blinks every second with a 50% duty
		 * cycle.
		 * MPC8xxFADS specific.
		 */
		/* Wait */ 
		OSTimeDly (T_DELAY * OS_TICKS_PER_SEC / 2);
		*bcsr4 ^= 0x10000000;

		/* Increment a counter to show it is working */ 
		ctrT_zzz++;
	}
}

void T_Smc1_Xmit (void *data)
{
	ctrT_Smc1_Xmit = 0;

	ticker_start (OS_TICKS_PER_SEC);

	for(;;)
	{
		OSTimeDly (2 * T_DELAY * OS_TICKS_PER_SEC);
		/* Just increment a counter to show it is working */ 
		ctrT_Smc1_Xmit++;
	}
}

void T_Smc1_Recv (void *data)
{
	ctrT_Smc1_Recv = 0;

	for(;;)
	{
		OSTimeDly (3 * T_DELAY * OS_TICKS_PER_SEC);
		/* Just increment a counter to show it is working */ 
		ctrT_Smc1_Recv++;
	}
}

void T_Console (void *data)
{
	ctrT_Console = 0;

	for(;;)
	{
		OSTimeDly (4 * T_DELAY * OS_TICKS_PER_SEC);
		/* Just increment a counter to show it is working */ 
		ctrT_Console++;
	}
}

void ticker_start (INT32S ticks_per_second)
{
	dec_init = TMBCLKS_PER_SEC / ticks_per_second;
	SMAC_set_decrementer (); 
	*((INT16U *)((INT32U)IMMR_BASE + (INT32U) 0x200)) |= 0x03;
	asm ("	mtspr EIE,r0"); /* external interrupt enable */ 
}