?? m500auc.lst
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199 =1 ------------------------------------------------*/
200 =1 sbit PX0 = 0xB8;
201 =1 sbit PT0 = 0xB9;
202 =1 sbit PX1 = 0xBA;
203 =1 sbit PT1 = 0xBB;
204 =1 sbit PS = 0xBC;
205 =1 sbit PT2 = 0xBD;
206 =1
207 =1 /*------------------------------------------------
208 =1 PSW Bit Registers
209 =1 ------------------------------------------------*/
210 =1 sbit P = 0xD0;
211 =1 sbit FL = 0xD1;
212 =1 sbit OV = 0xD2;
213 =1 sbit RS0 = 0xD3;
214 =1 sbit RS1 = 0xD4;
215 =1 sbit F0 = 0xD5;
216 =1 sbit AC = 0xD6;
217 =1 sbit CY = 0xD7;
218 =1
219 =1 /*------------------------------------------------
220 =1 Interrupt Vectors:
221 =1 Interrupt Address = (Number * 8) + 3
222 =1 ------------------------------------------------*/
223 =1 #define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */
224 =1 #define TF0_VECTOR 1 /* 0x0B Timer 0 */
225 =1 #define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */
C51 COMPILER V7.10 M500AUC 11/18/2004 15:28:02 PAGE 5
226 =1 #define TF1_VECTOR 3 /* 0x1B Timer 1 */
227 =1 #define SIO_VECTOR 4 /* 0x23 Serial port */
228 =1
229 =1 /*------------------------------------------------
230 =1 ------------------------------------------------*/
231 =1
16 #include <Mfreg500.h>
1 =1 //////////////////////////////////////////////////////////////////////////////
2 =1 // Copyright (c), Philips Semiconductors Systems Laboratory Hamburg
3 =1 //
4 =1 // (C)PHILIPS Electronics N.V. 2000
5 =1 // All rights are reserved. Reproduction in whole or in part is
6 =1 // prohibited without the written consent of the copyright owner.
7 =1 // Philips reserves the right to make changes without notice at any time.
8 =1 // Philips makes no warranty, expressed, implied or statutory, including but
9 =1 // not limited to any implied warranty of merchantibility or fitness for any
10 =1 //particular purpose, or that the use will not infringe any third party patent,
11 =1 // copyright or trademark. Philips must not be liable for any loss or damage
12 =1 // arising from its use.
13 =1 //////////////////////////////////////////////////////////////////////////////
14 =1 //
15 =1 // Projekt : M500A
16 =1 // Files : mfreg500.h
17 =1 // Created : 01.04.00
18 =1 //
19 =1 // COMMENT: Headerfile for proximity coupled device - reader module
20 =1 //
21 =1 // Functions:
22 =1 //============================================================================
23 =1 // 01.04.00 HB
24 =1 // File creation
25 =1 //////////////////////////////////////////////////////////////////////////////
26 =1
27 =1 #ifndef MFREG500_H
28 =1 #define MFREG500_H
29 =1
30 =1 #ifdef __cplusplus
=1 extern "C"
=1 {
=1 #endif
34 =1
35 =1 //#include <mfosdefs.h>
36 =1
37 =1 // Important registers of the MF RC500 reader module
38 =1 // PAGE 0 Command and Status
39 =1 #define RegPage 0x00 // Page Select Register
40 =1 #define RegCommand 0x01 // Command Register
41 =1 #define RegFIFOData 0x02 // FiFo Register
42 =1 #define RegPrimaryStatus 0x03 // Modem State/IRQ/ERR/LoHiAlert Reg
43 =1 #define RegFIFOLength 0x04 // Buffer lenght Register
44 =1 #define RegSecondaryStatus 0x05
45 =1 #define RegInterruptEn 0x06 // IRQ enable Register
46 =1 #define RegInterruptRq 0x07 // IRQ bits Register
47 =1 // PAGE 1 Control and Status
48 =1 #define RegControl 0x09 // processor control
49 =1 #define RegErrorFlag 0x0A
50 =1 #define RegCollpos 0x0B
51 =1 #define RegTimerValue 0x0C
52 =1 #define RegCRCResultLSB 0x0D
53 =1 #define RegCRCResultMSB 0x0E
54 =1 #define RegBitFraming 0x0F
55 =1 // PAGE 2 Transmitter and Coder Control
C51 COMPILER V7.10 M500AUC 11/18/2004 15:28:02 PAGE 6
56 =1 #define RegTxControl 0x11
57 =1 #define RegCwConductance 0x12
58 =1 #define RFU13 0x13
59 =1 #define RFU14 0x14
60 =1 #define RegModWidth 0x15
61 =1 #define RFU16 0x16
62 =1 #define RFU17 0x17
63 =1 // PAGE 3 Receiver and Decoder Control
64 =1 #define RegRxControl1 0x19
65 =1 #define RegDecoderControl 0x1A
66 =1 #define RegBitPhase 0x1B
67 =1 #define RegRxThreshold 0x1C
68 =1 #define RFU1D 0x1D
69 =1 #define RegRxControl2 0x1E
70 =1 #define RegClockQControl 0x1F
71 =1 // PAGE 4 RF-Timing and Channel Redundancy
72 =1 #define RegRxWait 0x21
73 =1 #define RegChannelRedundancy 0x22
74 =1 #define RegCRCPresetLSB 0x23
75 =1 #define RegCRCPresetMSB 0x24
76 =1 #define RFU25 0x25
77 =1 #define RegMfOutSelect 0x26
78 =1 #define RFU27 0x27
79 =1 // PAGE 5 FIFO, Timer and IRQ-Pin Configuration
80 =1 #define RegFIFOLevel 0x29
81 =1 #define RegTimerClock 0x2A
82 =1 #define RegTimerControl 0x2B
83 =1 #define RegTimerReload 0x2C
84 =1 #define RegIRqPinConfig 0x2D
85 =1 #define RFU2E 0x2E
86 =1 #define RFU2F 0x2F
87 =1 // PAGE 6 RFU
88 =1 #define RFU31 0x31
89 =1 #define RFU32 0x32
90 =1 #define RFU33 0x33
91 =1 #define RFU34 0x34
92 =1 #define RFU35 0x35
93 =1 #define RFU36 0x36
94 =1 #define RFU37 0x37
95 =1 // PAGE 7 Test Control
96 =1 #define RFU39 0x39 //!< RFU
97 =1 #define RegTestAnaSelect 0x3A //!< selects analog test mode
98 =1 #define RFU3B 0x3B //!< RFU
99 =1 #define RFU3C 0x3C //!< RFU
100 =1 #define RegTestDigiSelect 0x3D //!< selects digital test mode
101 =1 #define RFU3E 0x3E //!< RFU
102 =1 #define RegTestDigiAccess 0x3F
103 =1
104 =1
105 =1 #define DEF_FIFO_LENGTH 64 // default FIFO length
106 =1
107 =1 #define SND_BUF_LEN 128 // max number of bytes to send
108 =1 #define RCV_BUF_LEN 128 // max number of bytes to receive
109 =1
110 =1 // P C D - C O M M A N D S
111 =1 #define PCD_IDLE 0x00 // No action: cancel current command
112 =1 // or home state, respectively
113 =1 #define PCD_WRITEE2 0x01 // Get data from FIFO and write it to the E2PROM
114 =1 #define PCD_READE2 0x03 // Read data from E2PROM and put it into the
115 =1 // FIFO
116 =1 #define PCD_LOADCONFIG 0x07 // Read data from E2PROM and initialise the
117 =1 // registers
C51 COMPILER V7.10 M500AUC 11/18/2004 15:28:02 PAGE 7
118 =1 #define PCD_LOADKEYE2 0x0B // Read a master key from the E2PROM and put
119 =1 // it into the master key buffer
120 =1 #define PCD_AUTHENT1 0x0C // Perform the first part of the card
121 =1 // authentication using the Crypto1 algorithm.
122 =1 // Remark: The master key is automatically taken
123 =1 // from
124 =1 // the master key buffer. this implies, that the
125 =1 // command LoadKeyE2 has to be executed before
126 =1 // to use a certain key for card authentication
127 =1 #define PCD_CALCCRC 0x12 // Activate the CRC-Coprocessor
128 =1 // Remark: The result of the CRC calculation can
129 =1 // be read from the register CRCResultXXX
130 =1 #define PCD_AUTHENT2 0x14 // Perform the second part of the card
131 =1 // authentication using the Crypto1 algorithm.
132 =1 #define PCD_RECEIVE 0x16 // Activate Receiver Circuitry. Before the
133 =1 // receiver actually starts, the state machine
134 =1 // waits until the time
135 =1 // configured in the register RcvWait has
136 =1 // passed.
137 =1 // Remark: It is possible to read data from the
138 =1 // FIFO although Receive is active. Thus it is
139 =1 // possible to receive any number of bytes by
140 =1 // reading them from the FIFO in time.
141 =1 #define PCD_LOADKEY 0x19 // Read a master key from the FIFO and put it
142 =1 // into the master key buffer
143 =1 // Remark: The master key has to be prepared in
144 =1 // a certain format. Thus, 12 byte have to be
145 =1 // passed to load a 6 byte master key
146 =1 #define PCD_TRANSMIT 0x1A // Transmit data from FIFO to the card
147 =1 // Remark: If data is already in the FIFO when
148 =1 // the command is activated, this data is
149 =1 // transmitted immediately. It is possible to
150 =1 // write data to the FIFO although Transmit
151 =1 // is active. Thus it is possible to transmitt
152 =1 // any number of bytes by writting them to the
153 =1 // FIFO in time.
154 =1 #define PCD_TRANSCEIVE 0x1E // Transmit data from FIFO to the card and after
155 =1 // that automatically activates the receiver.
156 =1 // Before the receiver actually starts, the
157 =1 // STATE MACHINE waits until the time configured
158 =1 // in the register RcvWait has passed.
159 =1 // Remark: This command is the combination of
160 =1 // Transmit and Receive
161 =1 #define PCD_RESETPHASE 0x3F // Runs the Reset- and Initialisation Phase
162 =1 // Remark: This command can not be activated by
163 =1 // software, but only by a Power-On or
164 =1 // Hard Reset
165 =1
166 =1
167 =1 #ifdef __cplusplus
=1 }
=1 #endif
170 =1
171 =1 #endif
172 =1 //////////////////////////////////////////////////////////////////////////////
173 =1 // End of File
174 =1 //////////////////////////////////////////////////////////////////////////////
17 #include <M500A.h>
1 =1 ///////////////////////////////////////////////////////////////////////////////
2 =1 // Copyright (c), Philips Semiconductors Gratkorn
3 =1 //
4 =1 // (C)PHILIPS Electronics N.V. 2000
C51 COMPILER V7.10 M500AUC 11/18/2004 15:28:02 PAGE 8
5 =1 // All rights are reserved. Reproduction in whole or in part is
6 =1 // prohibited without the written consent of the copyright owner.
7 =1 // Philips reserves the right to make changes without notice at any time.
8 =1 // Philips makes no warranty, expressed, implied or statutory, including but
9 =1 // not limited to any implied warranty of merchantibility or fitness for any
10 =1 //particular purpose, or that the use will not infringe any third party patent,
11 =1 // copyright or trademark. Philips must not be liable for any loss or damage
12 =1 // arising from its use.
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