if (mems->count < type)    m= (class cl_mem *)(mems->at(MEM_DUMMY));  else    m= (class cl_mem *)(mems->at(type));  return(m);}class cl_mem *cl_uc::mem(char *class_name){  int i, found= 0;  char *mcn, *n, *s;  if (!class_name)    return(0);  s= n= strdup(class_name);  while (*s)    {      *s= toupper(*s);      s++;    }  if (!class_name ||      !(*class_name))    return(0);  for (i= 0; !found && i < mems->count; i++)    {      cl_mem *m= (cl_mem *)(mems->at(i));      if (!m ||	  !m->class_name ||	  !(*(m->class_name)))	continue;      s= mcn= strdup(m->class_name);      while (*s)	{	  *s= toupper(*s);	  s++;	}      if (strstr(/*m->class_name*/mcn,/*class_name*/n) == /*m->class_name*/mcn)	found= 1;      free(mcn);      if (found)	{	  free(n);	  return(m);	}    }  free(n);  return(0);}static longReadInt(FILE *f, bool *ok, int bytes){  char s2[3];  long l= 0;  *ok= DD_FALSE;  while (bytes)    {      if (fscanf(f, "%2c", &s2[0]) == EOF)	return(0);      s2[2]= '\0';      l= l*256 + strtol(s2, NULL, 16);      bytes--;    }  *ok= DD_TRUE;  return(l);}/*  * Reading intel hexa file into EROM *____________________________________________________________________________ * * If parameter is a NULL pointer, this function reads data from `cmd_in' * */longcl_uc::read_hex_file(const char *nam){  FILE *f;  int c;  long written= 0, recnum= 0;  uchar dnum;     // data number  uchar rtyp=0;   // record type  uint  addr= 0;  // address  uchar rec[300]; // data record  uchar sum ;     // checksum  uchar chk ;     // check  int  i;  bool ok, get_low= 1;  uchar low= 0, high;  if (!nam)    {      sim->app->get_commander()->	dd_printf("cl_uc::read_hex_file File name not specified\n");      return(-1);    }  else    if ((f= fopen(nam, "r")) == NULL)      {	fprintf(stderr, "Can't open `%s': %s\n", nam, strerror(errno));	return(-1);      }  //memset(inst_map, '\0', sizeof(inst_map));  ok= DD_TRUE;  while (ok &&	 rtyp != 1)    {      while (((c= getc(f)) != ':') &&	     (c != EOF)) ;      if (c != ':')	{fprintf(stderr, ": not found\n");break;}      recnum++;      dnum= ReadInt(f, &ok, 1);//printf("dnum=%02x",dnum);      chk = dnum;      addr= ReadInt(f, &ok, 2);//printf("addr=%04x",addr);      chk+= (addr & 0xff);      chk+= ((addr >> 8) & 0xff);      rtyp= ReadInt(f, &ok, 1);//printf("rtyp=%02x ",rtyp);      chk+= rtyp;      for (i= 0; ok && (i < dnum); i++)	{	  rec[i]= ReadInt(f, &ok, 1);//printf("%02x",rec[i]);	  chk+= rec[i];	}      if (ok)	{	  sum= ReadInt(f, &ok, 1);//printf(" sum=%02x\n",sum);	  if (ok)	    {	      if (((sum + chk) & 0xff) == 0)		{		  if (rtyp == 0)		    {		      if (get_mem_width(MEM_ROM) > 8)			addr/= 2;		      for (i= 0; i < dnum; i++)			{			  if (get_mem_width(MEM_ROM) <= 8)			    {			      set_mem(MEM_ROM, addr, rec[i]);			      addr++;			      written++;			    }			  else if (get_mem_width(MEM_ROM) <= 16)			    {			      if (get_low)				{				  low= rec[i];				  get_low= 0;				}			      else				{				  high= rec[i];				  set_mem(MEM_ROM, addr, (high*256)+low);				  addr++;				  written++;				  get_low= 1;				}			    }			}		    }		  else		    if (sim->app->args->get_iarg('V', 0) &&			rtyp != 1)		      sim->app->get_commander()->			dd_printf("Unknown record type %d(0x%x)\n", rtyp, rtyp);		}	      else		if (sim->app->args->get_iarg('V', 0))		  sim->app->get_commander()->		    dd_printf("Checksum error (%x instead of %x) in "			   "record %ld.\n", chk, sum, recnum);	    }	  else	    if (sim->app->args->get_iarg('V', 0))	      sim->app->get_commander()->		dd_printf("Read error in record %ld.\n", recnum);	}    }  if (get_mem_width(MEM_ROM) > 8 &&      !get_low)    set_mem(MEM_ROM, addr, low);  if (nam)    fclose(f);  if (sim->app->args->get_iarg('V', 0))    sim->app->get_commander()->dd_printf("%ld records have been read\n", recnum);  analyze(0);  return(written);}/* * Handling instruction map * * `inst_at' is checking if the specified address is in instruction * map and `set_inst_at' marks the address in the map and * `del_inst_at' deletes the mark. `there_is_inst' cheks if there is * any mark in the map */boolcl_uc::inst_at(t_addr addr){  class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);    if (!rom)    return(0);  //return(rom->inst_map->get(addr));  return(rom->get_cell_flag(addr, CELL_INST));}voidcl_uc::set_inst_at(t_addr addr){  class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);    if (rom)    //rom->inst_map->set(addr);    rom->set_cell_flag(addr, DD_TRUE, CELL_INST);}voidcl_uc::del_inst_at(t_addr addr){  class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);    if (rom)    //rom->inst_map->clear(addr);    rom->set_cell_flag(addr, DD_FALSE, CELL_INST);}boolcl_uc::there_is_inst(void){  class cl_mem/*rom*/ *rom= /*(class cl_rom *)*/mem(MEM_ROM);    if (!rom)    return(0);  //return(!(rom->inst_map->empty()));  bool got= DD_FALSE;  t_addr addr;  for (addr= 0; addr < rom->size && !got; addr++)    got= rom->get_cell_flag(addr, CELL_INST);  return(got);}/* * Manipulating HW elements of the CPU ***************************************************************************** *//* Register callback hw objects for mem read/write *//*voidcl_uc::register_hw_read(enum mem_class type, t_addr addr, class cl_hw *hw){  class cl_mem *m;  class cl_memloc *l;  if ((m= (class cl_mem*)mems->at(type)))    {      if ((l= m->read_locs->get_loc(addr)) == 0)	{	  l= new cl_memloc(addr);	  l->init();	  m->read_locs->add(l);	}      l->hws->add(hw);    }  else    printf("cl_uc::register_hw_read TROUBLE\n");}*//*voidcl_uc::register_hw_write(enum mem_class type, t_addr addr, class cl_hw *hw){}*//* Looking for a specific HW element */class cl_hw *cl_uc::get_hw(enum hw_cath cath, int *idx){  class cl_hw *hw= 0;  int i= 0;  if (idx)    i= *idx;  for (; i < hws->count; i++)    {      hw= (class cl_hw *)(hws->at(i));      if (hw->cathegory == cath)	break;    }  if (i >= hws->count)    return(0);  if (idx)    *idx= i;  return(hw);}class cl_hw *cl_uc::get_hw(char *id_string, int *idx){  class cl_hw *hw= 0;  int i= 0;  if (idx)    i= *idx;  for (; i < hws->count; i++)    {      hw= (class cl_hw *)(hws->at(i));      if (strstr(hw->id_string, id_string) == hw->id_string)	break;    }  if (i >= hws->count)    return(0);  if (idx)    *idx= i;  return(hw);}class cl_hw *cl_uc::get_hw(enum hw_cath cath, int hwid, int *idx){  class cl_hw *hw;  int i= 0;  if (idx)    i= *idx;  hw= get_hw(cath, &i);  while (hw &&	 hw->id != hwid)    {      i++;      hw= get_hw(cath, &i);    }  if (hw &&       idx)    *idx= i;  return(hw);}class cl_hw *cl_uc::get_hw(char *id_string, int hwid, int *idx){  class cl_hw *hw;  int i= 0;  if (idx)    i= *idx;  hw= get_hw(id_string, &i);  while (hw &&	 hw->id != hwid)    {      i++;      hw= get_hw(id_string, &i);    }  if (hw &&       idx)    *idx= i;  return(hw);}/* * Help of the command interpreter */struct dis_entry *cl_uc::dis_tbl(void){  static struct dis_entry empty= { 0, 0, 0, 0, NULL };  return(&empty);}struct name_entry *cl_uc::sfr_tbl(void){  static struct name_entry empty= { 0, 0 };  return(&empty);}struct name_entry *cl_uc::bit_tbl(void){  static struct name_entry empty= { 0, 0 };  return(&empty);}char *cl_uc::disass(t_addr addr, char *sep){  char *buf;  buf= (char*)malloc(100);  strcpy(buf, "uc::disass() unimplemented\n");  return(buf);}voidcl_uc::print_disass(t_addr addr, class cl_console *con){  char *dis;  class cl_brk *b;  int i;  class cl_mem *rom= mem(MEM_ROM);  t_mem code= get_mem(MEM_ROM, addr);  if (!rom)    return;  b= fbrk_at(addr);  dis= disass(addr, NULL);  if (b)    con->dd_printf("%c", (b->perm == brkFIX)?'F':'D');  else    con->dd_printf(" ");  con->dd_printf("%c ", inst_at(addr)?' ':'?');  con->dd_printf(rom->addr_format, addr); con->dd_printf(" ");  con->dd_printf(rom->data_format, code);  for (i= 1; i < inst_length(addr); i++)    {      con->dd_printf(" ");      con->dd_printf(rom->data_format, get_mem(MEM_ROM, addr+i));    }  int li= longest_inst();  while (i < li)    {      int j;      j= rom->width/4 + ((rom->width%4)?1:0) + 1;      while (j)	con->dd_printf(" "), j--;      i++;    }  con->dd_printf(" %s\n", dis);  free(dis);}voidcl_uc::print_regs(class cl_console *con){  con->dd_printf("No registers\n");}intcl_uc::inst_length(t_addr addr){  struct dis_entry *tabl= dis_tbl();  int i;  t_mem code;  code = get_mem(MEM_ROM, addr);  for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++) ;  return(tabl[i].mnemonic?tabl[i].length:1);}intcl_uc::inst_branch(t_addr addr){  struct dis_entry *tabl= dis_tbl();  int i;  t_mem code;  code = get_mem(MEM_ROM, addr);  for (i= 0; tabl[i].mnemonic && (code & tabl[i].mask) != tabl[i].code; i++)    ;  return tabl[i].branch;}intcl_uc::longest_inst(void){  struct dis_entry *de= dis_tbl();  int max= 0;  while (de &&	 de->mnemonic)    {      if (de->length > max)	max= de->length;      de++;    }  return(max);}boolcl_uc::get_name(t_addr addr, struct name_entry tab[], char *buf){  int i;  i= 0;  while (tab[i].name &&	 (!(tab[i].cpu_type & type) ||	 (tab[i].addr != addr)))    i++;  if (tab[i].name)    strcpy(buf, tab[i].name);  return(tab[i].name != NULL);}char *cl_uc::symbolic_bit_name(t_addr bit_address,			 class cl_mem *mem,			 t_addr mem_addr,			 t_mem bit_mask){  char *sym_name= 0;  int i;  i= 0;  while (bit_tbl()[i].name &&	 (bit_tbl()[i].addr != bit_address))    i++;  if (bit_tbl()[i].name)    {      sym_name= strdup(bit_tbl()[i].name);      return(sym_name);    }  if (mem &&      mem->class_name &&      strstr(mem->class_name, "sfr") == mem->class_name)    {      i= 0;      while (sfr_tbl()[i].name &&	     (sfr_tbl()[i].addr != mem_addr))	i++;      if (sfr_tbl()[i].name)	sym_name= strdup(sfr_tbl()[i].name);