/*
 *  Start of Zoran Standard Header
 *  Copyright (c) 2003 - 2004 Zoran Corporation.
 *  
 *  
 *  All rights reserved.  Proprietary and confidential.
 *  
 *  DESCRIPTION for usbpriv.h
 *      USB private include file defines, declarations
 *  
 *  NEW HISTORY COMMENT (description must be followed by a blank line)
 *  <Enter change description here>

 *  ===== HISTORY of changes in //depot/misc/projects/tps/usb/usbpriv.h
 *  
 *  30/Jun/04 #37 mrhines Endpoint change now on by default for SE* (and all other configurations)
 *  17/Jun/04 #36 lee Changed endpoints off by default for SE*, on for all others.
 *  15/Jun/04 #35 lee Found Card Reader problem, USB_PHY_EP_FIX=1 is the default again.
 *  15/Jun/04 #34 lee Made USB_PHY_EP_FIX=0 the default, i.e., no endpoint switch.
 *  15/Jun/04 #33 lee Increase max no. of endpoints to 9, common defs for EP
 *                    numbers, set -DUSB_PHY_EP_FIX=0 to revert to old ep numbers.
 *  3/Jun/04 #32 lee Change FIFO_DATA_ADDRESS to RAM addr rather than FIFO addr.
 *  28/May/04 #31 lee Added address of FIFO for USBH 2.0 work-around.
 *  12/May/04 #30 lee Make no scan/debug interface for CH* the default.
 *  10/May/04 #29 lee Support config w/o scanner and/or debug channels, e.g., CH*
 *  10/May/04 #28 lee Remove RAM_FLASH debug code.
 *  10/May/04 #27 lee Remove GRINDSTONE build option
 *  28/Apr/04 #26 lee Give USB tasks different priorities to help with debugging.
 *  7/Apr/04 #25 lee Back out HPC interface (function replaced by tps debug)
 *  2/Mar/04 #24 lee USB2.0 default packet size, HS_BULK_SIZE,
 *  now 512. May be overridden by defining HS_BULK_SIZE explicitly
 *  or defining DEFAULT_ARBITER (HS_BULK_SIZE then set to 64)
 *  12/Feb/04 #23 lee Force USB buffers to non-cachable memory using ALIGN macros.
 *  29/Jan/04 #22 lee If ARBITER_TEST defined, use 256 for USB 2.0 (high-speed) packet size.
 *  28/Jan/04 #21 lee Make USB2.0 default; still possible to override with "-DFULL_SPEED_ONLY=1"
 *  26/Jan/04 #20 lee Allow value of HS_BULK_SIZE to be overridden.
 *  23/Jan/04 #19 lee Make memory card reader the default unless explicitly disabled
 *  23/Jan/04 #18 lee Changed high-speed packet size from 512 to 64.
 *  8/Jan/04 #17 lee Added ENDPOINT_PRIMED macro
 *  13/Nov/03 #15 lee Don't allow HPC option for GRINDSTONE or boot code.
 *  10/Nov/03 #14 lee Changes for HPC for sending printf's to host PC
 *  31/Oct/03 #13 lee Fixes to pass USB2.0 and HID compliance.
 *  29/Oct/03 #12 lee Increase MAX_STR_DESC_COUNT for UNBRIDLED
 *  15/Oct/03 #11 lee Undefine MEMORY_CARD_READER if GRINDSTONE build.
 *  14/Oct/03 #10 lee Name changes for RAM_FLASH (formerly DUMMY_FLASH)
 *  14/Oct/03 #9 pshread Debug printing disabled my default.  Too much spitting out serial port otherwise
 *  24/Sep/03 #8 lee Added memory card function prototype, Gridstone changes.
 *  22/Sep/03 #7 lee Fix PRINTER_IFACE definition for GRINDSTONE
 *  19/Sep/03 #6 lee Work continues on Mass Storage Class for memory cards.
 *  18/Sep/03 #5 lee Fixes for memory card code.
 *  29/Aug/03 #4 lee Made memory card reader depend on MEMORY_CARD_READER manifest
 *  28/Aug/03 #3 lee Changes for Memory Card interface, added ASSERT for boot code.
 *  27/Aug/03 #2 emiller Removed "ASSERT" definition
 *  21/Aug/03 #1 lee Created
 *  
 *  End of Zoran Standard Header
 */
/******************************************************************************/
#ifndef USBPRIV_INCLUDED
#define USBPRIV_INCLUDED

#ifdef GRINDSTONE
#error GRINDSTONE build option no longer supported
#endif
#ifdef RAM_FLASH
#error RAM_FLASH build option no longer supported
#endif

/* Make memory card reader the default unless explicitly disabled */
#ifdef NO_MEMORY_CARD_READER
#ifdef MEMORY_CARD_READER
#undef MEMORY_CARD_READER
#endif
#else
#ifndef MEMORY_CARD_READER
#define MEMORY_CARD_READER
#endif
#endif

#ifdef BOOTCODE

/* boot build doesn't support memory card reader */
#ifdef MEMORY_CARD_READER
#undef MEMORY_CARD_READER
#endif

/* Boot build default: status printing off */
#ifndef USB_STATUS_PRINT
#define USB_STATUS_PRINT 0
#endif

#else

/* Nucleus build default: status printing on */
#ifndef USB_STATUS_PRINT
#define USB_STATUS_PRINT 1
#endif

#endif

/* Force (broken) chip to never come up in USB2.0 mode if default overridden */
#ifndef FULL_SPEED_ONLY
#define FULL_SPEED_ONLY 0
#endif

#ifndef USB_PRINT_BUFF_SIZE
#define USB_PRINT_BUFF_SIZE     65535
#endif
#define USB_RCV_PRINT_LIMIT     (USB_PRINT_BUFF_SIZE & ~511)

#ifndef USB_SCAN_BUFF_SIZE
#define USB_SCAN_BUFF_SIZE      65535
#endif
#define USB_RCV_SCAN_LIMIT      (USB_SCAN_BUFF_SIZE & ~511)

#ifndef USB_CARD_BUFF_SIZE
#define USB_CARD_BUFF_SIZE      65535
#endif
#define USB_RCV_CARD_LIMIT      (USB_CARD_BUFF_SIZE & ~511)

#ifndef USB_DEBUG_BUFF_SIZE
#define USB_DEBUG_BUFF_SIZE     2048
#endif
#define USB_RCV_DEBUG_LIMIT     (USB_DEBUG_BUFF_SIZE & ~511)

#ifndef FALSE
#define FALSE ((Boolean)0)
#endif
#ifndef TRUE
#define TRUE ((Boolean)1)
#endif
#ifdef  NULL
#undef  NULL
#endif
#define NULL ((void *)0)

#ifndef MIN
#define MIN(a,b) ((a) < (b) ? (a) : (b))      
#endif

#ifdef DEBUG
#define USB_ASSERT(_XX_) ASSERT(_XX_)
#else
#define USB_ASSERT(_XX_)
#endif

#ifdef BOOTCODE
#define ASSERT(_XX_) { if (!(_XX_)) while (1) ; }
#endif

/* Interrupt bit position in MECRA, EXCLRA registers, (i.e., 1 << 1) */
#define USB_INTERRUPT_BIT 1

/* 20ms Resume assertion for Remote Wakeup */
#define USB_RESUME_ASSERTION_PERIOD (20)

/* Error Codes for USB */
#define USB_OK                      (0x00)
#define USB_INITIALIZATION_ERROR    (0x01)
#define USBERR_ALLOC_BUFF           (0x04)
#define USBERR_EP_CLOSED            (0x12)

/* Error Codes for lower-layer */
#define USBERR_ALLOC_EP_QUEUE_HEAD  (0x13)
#define USBERR_ALLOC_TR             (0x14)
#define USBERR_ALLOC_DTD_BASE       (0x15)

/* USB device speed defines */
#define USB_DEV_HIGH_SPEED          (0x01)
#define USB_DEV_FULL_SPEED          (0x02)
#define USB_DEV_LOW_SPEED           (0x03) /* not used */

/* USB state */
#define USB_STATE_POWER_ON          (0x00)
#define USB_STATE_DEFAULT           (0x01)
#define USB_STATE_ADDRESS           (0x02)
#define USB_STATE_CONFIG            (0x04)

/* USB device state */
#define USB_SELF_POWERED            (0x01)
#define USB_REMOTE_WAKEUP           (0x02)
#define USB_PORT_TEST               (0x04)

/* Command Register Bit Masks */
#define VUSB_CMD_RUN_STOP           (0x00000001)
#define VUSB_CMD_CTRL_RESET         (0x00000002)

/* Mode Register Bit Masks */
#define VUSB_MODE_CTRL_MODE_DEV     (0x00000002)

/* Interrupt Enable Register Bit Masks */
#define VUSB_INTR_INT_EN                (0x00000001)
#define VUSB_INTR_ERR_INT_EN            (0x00000002)
#define VUSB_INTR_PORT_CHANGE_DETECT_EN (0x00000004)
#define VUSB_INTR_RESET_EN              (0x00000040)
#define VUSB_INTERRUPT_BITS             (0x00000047)

/* Interrupt Status Register Masks */
#define VUSB_STS_SOF                    (0x00000080)
#define VUSB_STS_RESET                  (0x00000040)
#define VUSB_STS_PORT_CHANGE            (0x00000004)
#define VUSB_STS_ERR                    (0x00000002)
#define VUSB_STS_INT                    (0x00000001)
#define VUSB_STS_SUSPEND                (0x00000100)

/* Endpoint Queue Head/dDT Bits/Bit Masks/etc. */
#define VUSB_EP_MAX_LENGTH_TRANSFER     (0x4000)   /* 16K */

#define DTD_TERM_BIT                    (0x00000001)
#define DTD_ADDR_MASK                   (0xFFFFFFE0)
#define DTD_IOC                         (0x00008000)
#define DTD_IOS                         (0x00008000)
#define DTD_ZERO_LEN_TER_SEL            (0x20000000)
#define DTD_STATUS_ACTIVE               (0x00000080)

#define VUSB_EPCTRL_TX_DATA_TOGGLE_RST  (0x00400000)
#define VUSB_EPCTRL_RX_DATA_TOGGLE_RST  (0x00000040)
#define VUSB_EPCTRL_EP_DATA_TOGGLE_RST  (0x00400040)
#define VUSB_EPCTRL_TX_EP_STALL         (0x00010000)
#define VUSB_EPCTRL_RX_EP_STALL         (0x00000001)
#define VUSB_EPCTRL_EP_STALL            (0x00010001)
#define VUSB_EPCTRL_RX_ENABLE           (0x00000080)
#define VUSB_EPCTRL_TX_ENABLE           (0x00800000)
#define VUSB_EPCTRL_RX_EP_MASK          (0xffff0000)
#define VUSB_EPCTRL_TX_EP_MASK          (0x0000ffff)

#define TX_ENABLE (VUSB_EPCTRL_TX_ENABLE | VUSB_EPCTRL_TX_DATA_TOGGLE_RST)
#define TX_T_SHFT 18
#define RX_ENABLE (VUSB_EPCTRL_RX_ENABLE | VUSB_EPCTRL_RX_DATA_TOGGLE_RST)
#define RX_T_SHFT 2

#define VUSB_PORTSCX_PORT_HIGH_SPEED    (0x00000200)
#define VUSB_PORTSCX_PORT_RESET         (0x00000100)
#define VUSB_PORTSCX_PORT_SUSPEND       (0x00000080)
#define VUSB_PORTSCX_PORT_FORCE_RESUME  (0x00000040)

#define VUSB_FRINDEX_MS_MASK            (0xFFFFFFF8)
#define VUSB_ADDRESS_BIT_SHIFT          (25)

#define USB_CTRL_PKT_SIZE               (64)
#define USB_RECV                        (0)
#define USB_SEND                        (1)

#define EP0_PKT_SIZE                    USB_CTRL_PKT_SIZE

/* Endpoint types */
#define USB_CONTROL_ENDPOINT            (0)
#define USB_ISOCHRONOUS_ENDPOINTx       (1) /* not supported */
#define USB_BULK_ENDPOINT               (2)
#define USB_INTERRUPT_ENDPOINT          (3)

#define USB_STATUS_ENDPOINT_NUMBER_MASK (0x0F)

/* Macro for aligning the EP queue head to 32 byte boundary (non-cachable) */
#define USB_MEM32_ALIGN(n)  (((Uint32)(n)|0x20000000) + (-((Uint32)(n)) & 31))

/* Macro for aligning the EP queue head to 1024 byte boundary (non-cachable) */
#define USB_MEM2048_ALIGN(n) (((Uint32)(n)|0x20000000) + (-((Uint32)(n)) & 2047))

/* Address of chip's 512 byte FIFO for USB 2.0 work-around */
#define FIFO_DATA_ADDRESS   ((Uint8 *)0xF9000000)
#define FIFO_ADDR (volatile Uint32 *)(0xF9000400)

#define DTD_POOL_CNT                (32)   /* Total no. of dTD structures */
#define USB_MAX_ENDPOINTS           (9)    /* 16 USB limit, 9 HW limit */

#define USB_TEST_MODE_PACKET_LENGTH (53)
#define USB_TEST_MODE_TEST_PACKET   (0x0400)

typedef volatile Uint32 USB_REGISTER;
typedef volatile Uint32 VUSB_FIELD_TYPE;

/* The VUSB register structure */
typedef struct {
    Uint8           CAPLENGTH;          /* Capability register length */
    Uint8           RESERVED0;
    Uint16          HCI_VERSION;        /* HCI version number */
    USB_REGISTER    HCS_PARAMS;         /* HC structural parameters */
    USB_REGISTER    HCC_PARAMS;         /* HC Capability Parameters*/
    USB_REGISTER    RESERVED1[5];
    Uint16          DCI_VERSION;        /* DC version number */
    Uint16          RESERVED2;
    USB_REGISTER    DCC_PARAMS;         /* DC Capability Parameters */
} VUSB20_CAPREG_STRUCT;

typedef struct {
    USB_REGISTER    USB_CMD;            /* Command register */
    USB_REGISTER    USB_STS;            /* Status register */
    USB_REGISTER    USB_INTR;           /* Interrupt enable */