?? ne2000.h
字號(hào):
/************************************************************
* File name : Ne2000.h *
* By : hugang, hgx2000@mail.china.com *
************************************************************/
#ifndef __NE2000_H__
#define __NE2000_H__
#define NE_WORDMODE 0//1
#define NE_START_PG 0x40 // First page of TX buffer
#define NE_STOP_PG 0x80 // Last page + 1 of RX Ring
#if NE_WORDMODE
#define NE_DCRVAL 0x49
#else
#define NE_DCRVAL 0x48
#endif
#define TX_PAGES 8
#define TX_START_PG NE_START_PG
#define RX_START_PG NE_START_PG + TX_PAGES
#define RX_STOP_PG NE_STOP_PG
#define RX_CURR_PG RX_START_PG + 1
#define EN_IO_BASE 0x06000000
#if NE_WORDMODE
#define EN_SHIFT(x) (*(volatile unsigned char *)(EN_IO_BASE + ((x)<<1)))
#else
#define EN_SHIFT(x) (*(volatile unsigned char *)(EN_IO_BASE + ((x)<<0)))
#endif
#define EN_CR EN_SHIFT(0x00) // The command register (for all pages)
#define EN_RESET EN_SHIFT(0x18)
#define EN_DATAW (*(volatile unsigned short *)(EN_IO_BASE + ((0x10)<<1)))
#if NE_WORDMODE
#define EN_DATAB (*(volatile unsigned char *)(EN_IO_BASE + ((0x10)<<1)))
#else
#define EN_DATAB (*(volatile unsigned char *)(EN_IO_BASE + ((0x10)<<0)))
#endif
#define EN_CLDA0 EN_SHIFT(0x01) // Low byte of current local dma addr
#define EN_CLDA1 EN_SHIFT(0x02) // High byte of current local dma addr
#define EN_TSR EN_SHIFT(0x04) // Transmit status reg
#define EN_NCR EN_SHIFT(0x05) // Number of collision reg
#define EN_FIFO EN_SHIFT(0x06) // FIFO
#define EN_CRDA0 EN_SHIFT(0x08) // Low byte of current remote dma address
#define EN_CRDA1 EN_SHIFT(0x09) // High byte of current remote dma address
#define EN_8019ID0 EN_SHIFT(0x0a) //
#define EN_8019ID1 EN_SHIFT(0x0b) //
#define EN_RSR EN_SHIFT(0x0c) // Rx status reg
#define EN_CNTR0 EN_SHIFT(0x0d) // Rcv alignment error counter
#define EN_CNTR1 EN_SHIFT(0x0e) // Rcv CRC error counter
#define EN_CNTR2 EN_SHIFT(0x0f) // Rcv missed frame error counter
#define EN_PSTART EN_SHIFT(0x01) // Starting page of ring bfr
#define EN_PSTOP EN_SHIFT(0x02) // Ending page +1 of ring bfr
#define EN_TPSR EN_SHIFT(0x04) // Transmit starting page
#define EN_TBCR0 EN_SHIFT(0x05) // Low byte of tx byte count
#define EN_TBCR1 EN_SHIFT(0x06) // High byte of tx byte count
#define EN_RSAR0 EN_SHIFT(0x08) // Low byte of remote start address reg
#define EN_RSAR1 EN_SHIFT(0x09) // High byte of remote start address reg
#define EN_RBCR0 EN_SHIFT(0x0a) // Low byte of remote byte count reg
#define EN_RBCR1 EN_SHIFT(0x0b) // Highe byte of remote byte count reg
#define EN_RCR EN_SHIFT(0x0c) // RX configuration reg
#define EN_TCR EN_SHIFT(0x0d) // TX configuration reg
#define EN_DCR EN_SHIFT(0x0e) // Data configuration reg
#define EN_IMR EN_SHIFT(0x0f) // Interrupt mask reg
#define EN_BNRY EN_SHIFT(0x03) // Boundary page of ring bfr
#define EN_ISR EN_SHIFT(0x07) // Interrupt status reg
#define EN_PAR0 EN_SHIFT(0x01) // This board's physical enet addr
#define EN_PAR1 EN_SHIFT(0x02)
#define EN_PAR2 EN_SHIFT(0x03)
#define EN_PAR3 EN_SHIFT(0x04)
#define EN_PAR4 EN_SHIFT(0x05)
#define EN_PAR5 EN_SHIFT(0x06)
#define EN_CURR EN_SHIFT(0x07) // Current memory page
#define EN_MAR0 EN_SHIFT(0x08) // Multicast filter mask array
#define EN_MAR1 EN_SHIFT(0x09)
#define EN_MAR2 EN_SHIFT(0x0a)
#define EN_MAR3 EN_SHIFT(0x0b)
#define EN_MAR4 EN_SHIFT(0x0c)
#define EN_MAR5 EN_SHIFT(0x0d)
#define EN_MAR6 EN_SHIFT(0x0e)
#define EN_MAR7 EN_SHIFT(0x0f)
#define EN_9346CR EN_SHIFT(0x01)
#define EN_BPAGE EN_SHIFT(0x02)
#define EN_CONFIG0 EN_SHIFT(0x03)
#define EN_CONFIG1 EN_SHIFT(0x04)
#define EN_CONFIG2 EN_SHIFT(0x05)
#define EN_CONFIG3 EN_SHIFT(0x06)
#define EN_TEST EN_SHIFT(0x07)
#define EN_CSNSAV EN_SHIFT(0x08)
#define EN_HLTCLK EN_SHIFT(0x09)
#define EN_INTR EN_SHIFT(0x0b)
#define EN_FMWP EN_SHIFT(0x0c)
#define EN_CONFIG4 EN_SHIFT(0x0d)
#define ENCR_STOP 0x01 // Stop and reset the chip
#define ENCR_START 0x02 // Start the chip, clear reset
#define ENCR_TRANS 0x04 // Transmit a frame
#define ENCR_RREAD 0x08 // Remote read
#define ENCR_RWRITE 0x10 // Remote write
#define ENCR_NODMA 0x20 // Remote DMA
#define ENCR_PAGE0 0x00 // Select page chip registers
#define ENCR_PAGE1 0x40 // using the two high-order bits
#define ENCR_PAGE2 0x80
#define ENCR_PAGE3 0xc0
#define ENISR_RX 0x01 // Receiver, no error
#define ENISR_TX 0x02 // Transceiver, no error
#define ENISR_RX_ERR 0x04 // Receiver, with error
#define ENISR_TX_ERR 0x08 // Transmitter, with error
#define ENISR_OVER 0x10 // Receiver overwrote the ring
#define ENISR_COUNTERS 0x20 // Counters need emptying
#define ENISR_RDC 0x40 // remote dma complete
#define ENISR_RESET 0x80 // Reset completed
#define ENIMR_RX 0x01
#define ENIMR_TX 0x02
#define ENIMR_RX_ERR 0x04
#define ENIMR_TX_ERR 0x08
#define ENIMR_OVER 0x10
#define ENIMR_COUNTERS 0x20
#define ENIMR_RDC 0x40
#define ENTSR_PTX 0x01 // Packet transmitted without error
#define ENTSR_ND 0x02 // The transmit wasn't deferred
#define ENTSR_COL 0x04 // The transmit collided at least once
#define ENTSR_ABT 0x08 // The transmit collided 16 times, and was deferred
#define ENTSR_CRS 0x10 // The carrier sense was lost
#define ENTSR_FU 0x20 // A "FIFO underrun" occurred during transmit
#define ENTSR_CDH 0x40 // The collision detect "heartbeat" signal was lost
#define ENTSR_OWC 0x80 // There was an out-of-window collision
#define ENRSR_RXOK 0x01 // Received a good packet
#define ENRSR_CRC 0x02 // CRC error(CNTR1++)
#define ENRSR_FAE 0x04 // Frame alignment error(CNTR0++)
#define ENRSR_FO 0x08 // FIFO overrun when receiving
#define ENRSR_MPA 0x10 // Missed packet.. Gap area isn't exist
#define ENRSR_PHY 0x20 // Physical/multicase address
#define ENRSR_DIS 0x40 // Receiver disable.set in monitor mode
#define ENRSR_DEF 0x80 // Deferring because of collision
#define ENTCR_TXCONFIG 0x00 // Normal transmit mode
#define ENTCR_CRC 0x01 // inhibit CRC,do not append crc when 1
#define ENTCR_LOOP 0x02 // set internal loopback mode
#define ENTCR_LB01 0x06 // encoded loopback control
#define ENTCR_ATD 0x08 // auto tx disable
#define ENTCR_OFST 0x10 // collision offset enable
#define ENTCR_TXOFF 0x02
#define ENRCR_RXCONFIG 0x04 // EN0_RXCR: broadcasts,no multicast,errors
#define ENRCR_CRC 0x01 // Save error packets(admit)
#define ENRCR_RUNT 0x02 // Accept runt pckt(below 64bytes)
#define ENRCR_BCST 0x04 // Accept broadcasts when 1
#define ENRCR_MULTI 0x08 // Multicast (if pass filter) when 0
#define ENRCR_PROMP 0x10 // Promiscuous physical addresses when 1
#define ENRCR_MON 0x20 // Monitor mode (no packets rcvd)
#define ENRCR_RXOFF 0x20
#define ENDCR_WTS 0x01 // byte transfer mode selection 0/1 byte/word width
#define ENDCR_BOS 0x02 // byte order selection
#define ENDCR_LAS 0x04 // long addr selection (must be set to zero)
#define ENDCR_BMS 0x08 // loopback select set is normal mode
#define ENDCR_ARM 0x10 // autoinitialize remote when 1
#define ENDCR_FT00 0x00 // fifo treshold 2 byte
#define ENDCR_FT01 0x20 // 4 byte
#define ENDCR_FT10 0x40 // 8 byte
#define ENDCR_FT11 0x60 // 12 byte
void getnic(unsigned short addr, unsigned char data[],unsigned short len);
void putnic(unsigned short addr, unsigned char data[],unsigned short len);
void ResetNic(void);
unsigned short GetEthernet(ETHERFRAME *efp);
unsigned short PutEthernet(ETHERFRAME *efp, unsigned short len);
unsigned short MakeFrame(ETHERFRAME *efp, unsigned char srce[], unsigned char dest[], unsigned short pcol, unsigned short dlen);
void SwapEther(ETHERFRAME *efp);
#endif
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