/*
 *  ======== device.c ========
 */
#include <csl.h>
#include <csl_mcbsp.h>
//#include <csl_legacy.h>
#include <csl_edma.h>
#include <csl_irq.h>
#include "audio.h"

/* Function Prototypes */
void initApplication(void);
void interruptsEnable(void);
static void edmaEnable(void);
static void mcbspEnable(void);
static void codecEnable(void);
static void mcbspWrite(unsigned int outdata);
static unsigned int mcbspRead(void);
static unsigned int codecReadControl(unsigned int reg);
static void codecWriteControl(unsigned int reg, unsigned int data);
static void codecError(int id);

/*
 *  Warning: Remove "interrupt" keyword (below) when making DSP/BIOS
 *  scheduled calls from within an interrupt.
 */
 
interrupt void edmaIsr(void);

/* External References */
extern volatile int inputReadyFlag;
extern volatile int outputReadyFlag;
extern volatile int edmaBufferMask;

/*
 *  ======== initApplication ========
 */
void initApplication(void)
{
    int i;

    for (i = 0; i < BUFSIZE; i++) {
        pingRX[i] = 0x0000;
        pongRX[i] = 0x0000;
        pingTX[i] = 0x0000;
        pongTX[i] = 0x0000;
    }

    mcbspEnable();                  /* Configure McBSP0 */

    codecEnable();                  /* Configure Codec */

    edmaEnable();                   /* Enable EDMA */
}

/*
 *  ======== interruptsEnable ========
 */
void interruptsEnable(void)
{
    IER |= 0x00000002;              /* enable NMIE */   
    //IRQ_globalRestore(1);           /* enable GIE  */   
    
}

/*
 *  ======== mcbspEnable ========
 */
static void mcbspEnable(void)
{
    /* Needed to set free bit */
    volatile int *spcr0 = (volatile int *)MCBSP_ADDR(SPCR0);
    
    /* Get a handle for McBSP0 */
    hMcbsp = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
      
    /* Configure the Serial Port */
    MCBSP_configArgs(
        hMcbsp,
        MCBSP_SPCR_RMK(
        	MCBSP_SPCR_FREE_DEFAULT,
        	MCBSP_SPCR_SOFT_DEFAULT,
            MCBSP_SPCR_FRST_YES,
            MCBSP_SPCR_GRST_YES,
            MCBSP_SPCR_XINTM_XRDY,
            MCBSP_SPCR_XSYNCERR_NO,
            //MCBSP_SPCR_XEMPTY_DEFAULT,
            //MCBSP_SPCR_XRDY_DEFAULT,
            MCBSP_SPCR_XRST_NO,
            MCBSP_SPCR_DLB_OFF,
            MCBSP_SPCR_RJUST_RZF,
            MCBSP_SPCR_CLKSTP_DISABLE,
            MCBSP_SPCR_DXENA_OFF,
            MCBSP_SPCR_RINTM_RRDY,
            MCBSP_SPCR_RSYNCERR_NO,
            //MCBSP_SPCR_RFULL_DEFAULT,
            //MCBSP_SPCR_RRDY_DEFAULT,
            MCBSP_SPCR_RRST_NO      
            ),
        MCBSP_RCR_RMK(
            MCBSP_RCR_RPHASE_SINGLE,
            MCBSP_RCR_RFRLEN2_OF(0),
            MCBSP_RCR_RWDLEN2_8BIT,    /* Not using Phase */
            MCBSP_RCR_RCOMPAND_MSB,
            MCBSP_RCR_RFIG_YES,
            MCBSP_RCR_RDATDLY_1BIT,
            MCBSP_RCR_RFRLEN1_OF(0),
            MCBSP_RCR_RWDLEN1_16BIT,
            MCBSP_RCR_RWDREVRS_DISABLE),
        MCBSP_XCR_RMK(
            MCBSP_XCR_XPHASE_SINGLE,
            MCBSP_XCR_XFRLEN2_OF(0),
            MCBSP_XCR_XWDLEN2_8BIT,    /* Not using Phase */
            MCBSP_XCR_XCOMPAND_MSB,
            MCBSP_XCR_XFIG_YES,
            MCBSP_XCR_XDATDLY_1BIT,
            MCBSP_XCR_XFRLEN1_OF(0),
            MCBSP_XCR_XWDLEN1_16BIT,
            MCBSP_XCR_XWDREVRS_DISABLE),
        MCBSP_SRGR_DEFAULT,
        MCBSP_MCR_DEFAULT,
        MCBSP_RCER_DEFAULT,
        MCBSP_XCER_DEFAULT,
        MCBSP_PCR_DEFAULT);

    *spcr0 |= 0x02000000;           /* Sets Free Bit */
}

/*
 *  ======== mcbspWrite ========
 */
static void mcbspWrite(unsigned int outdata)
{  
    while (!(MCBSP_xrdy(hMcbsp))) {
    }
    
    MCBSP_write(hMcbsp, outdata);
}

/*
 *  ======== mcbspRead ========
 */
static unsigned int mcbspRead(void)
{
    while (!(MCBSP_rrdy(hMcbsp))) {
    }

    return (MCBSP_read(hMcbsp));
}

/*
 *  ======== codecEnable ========
 */
static void codecEnable(void)
{
    unsigned int temp;

   /* 
    *  Perform Voice Channel Initialization of TLC320AD535 Codec    
    *  AD535 has 2 serial port channels - Data, Voice               
    *  Data  Channel Controlled by Registers 1,2    (Reg 0 = NOP)   
    *  Voice Channel Controlled by Registers 3,4,5,6                
    *  Only Voice channel used on DSK 6211                          
    */

    /* Set-Up Register 0 (NOP) - Dummy Read/Write Codec */
    codecWriteControl(0, 0);
    temp = codecReadControl(0);

   /* 
    *  Set-Up Register 1 / 2   - Only Used by Data Serial Port -NA  
    *  Set-Up Register 3       - S/W Reset + Power Down + No loop / gain=0dB 
    */

    codecWriteControl(3, 0x00C6);       /* + With Reset    */
    codecWriteControl(3, 0x0006);       /* + Without Reset */
    temp = codecReadControl(3);
    if ((temp & 0x00ff) != 0x0006) {
        codecError(3);
    }

    /* Set-Up Register 4       - Voice ADC gain = 0dB   */
    codecWriteControl(4, 0x0000);
    temp = codecReadControl(4);
    if ((temp & 0x00ff) != 0x0000) {
        codecError(4);
    }

    /* Set-Up Register 5       - Spkr L/R gain = 0dB    */
    codecWriteControl(5, 0x0002);
    temp = codecReadControl(5);
    if ((temp & 0x00fe) != 0x0002) {
        codecError(5);
    }

    /* Set-Up Register 6       - Handset gain  = 0dB    */
    codecWriteControl(6, 0x0000);
    temp = codecReadControl(6);
    if ((temp & 0x0080) != 0x0000) {
        codecError(6);
    }

    /* Set-Up Register - (NOP)      */
    codecWriteControl(0, 0);
    temp = codecReadControl(0);
}

/*
 *  ======== codecReadControl ========
 */
static unsigned int codecReadControl(unsigned int reg)
{
    unsigned int temp = 0;
    
    temp = (((reg & 0x001F) << 8) | 0x2000);

    mcbspWrite(0);
    mcbspRead( );

    mcbspWrite(1);
    mcbspRead( );

    mcbspWrite(temp);
    temp = mcbspRead( );

    mcbspWrite(0);
    mcbspRead( );

    return temp;
}

/*
 *  ======== codecWriteControl ========
 */
static void codecWriteControl(unsigned int reg, unsigned int data)
{
    unsigned int temp = 0;
    
    temp = ((reg & 0x001F) << 8) | (data & 0x00ff);

    mcbspWrite(0);
    mcbspRead( );

    mcbspWrite(1);
    mcbspRead( );

    mcbspWrite(temp);
    mcbspRead( );

    mcbspWrite(0);
    mcbspRead( );
}

/*
 *  ======== edmaEnable ========
 */
static void edmaEnable(void)
{
    /* General EDMA Initialization  */
    EDMA_reset(EDMA_HINV);       /* Clear all pending events           */
    EDMA_RSET(CIER, 0x000);
    EDMA_RSET(CIPR, 0xFFFF);     /* Clear all pending Queued EDMA ints */
    
    hEdmaTx = EDMA_open(EDMA_CHA_XEVT0, 0);              /* Channel 12 */
    hEdmaRx = EDMA_open(EDMA_CHA_REVT0, 0);              /* Channel 13 */

    /* Initialize EDMA for Transfer from McBSP Channel 0 */
    EDMA_configArgs(
      hEdmaRx,
      EDMA_OPT_RMK(
        EDMA_OPT_PRI_HIGH,
        EDMA_OPT_ESIZE_16BIT,
        EDMA_OPT_2DS_NO,
        EDMA_OPT_SUM_NONE,
        EDMA_OPT_2DD_NO,
        EDMA_OPT_DUM_INC,
        EDMA_OPT_TCINT_YES,
        EDMA_OPT_TCC_OF(0X4),
        EDMA_OPT_LINK_NO,
        EDMA_OPT_FS_NO),
      MCBSP_getRcvAddr(hMcbsp),
      PRESENT,
      (Uint32)&pingRX[HISTORY],
      EDMA_IDX_DEFAULT,
      EDMA_RLD_DEFAULT
    );

    /* Initialize EDMA for Transfer Samples back to McBSP Channel 0 */
    EDMA_configArgs(
      hEdmaTx,
      EDMA_OPT_RMK(
        EDMA_OPT_PRI_LOW,
        EDMA_OPT_ESIZE_16BIT,
        EDMA_OPT_2DS_NO,
        EDMA_OPT_SUM_INC,
        EDMA_OPT_2DD_NO,
        EDMA_OPT_DUM_NONE,
        EDMA_OPT_TCINT_YES,
        EDMA_OPT_TCC_OF(0X6),
        EDMA_OPT_LINK_NO,
        EDMA_OPT_FS_NO),
      (Uint32)&pongTX[HISTORY],
      PRESENT,
      MCBSP_getXmtAddr(hMcbsp),
      EDMA_IDX_DEFAULT,
      EDMA_RLD_DEFAULT
    );

    /* Enable Channels */
    EDMA_enableChannel(hEdmaTx);
    EDMA_enableChannel(hEdmaRx);
    
    /* Enable Rx/Tx Complete Interrupts */
    EDMA_RSET(CIER, 0x00f0); 
    
    /* Enable Interrupts IRQ's  */
    IRQ_map(IRQ_EVT_EDMAINT, 8);    /* map DMA event to Hardware Int 8      */
    IRQ_enable(IRQ_EVT_EDMAINT);    /* Enable EDMA-to-CPU interrupt (int 8) */
}

/*
 *  ======== codecError ========
 */
static void codecError (int id)
{
    /* Codec Initialization Error - Exit and Reset DSK */
    for (;;) {
    }       /* loop forever */
}

/*
 *  ======== edmaIsr ========
 */
interrupt void edmaIsr(void)
{

   /*    
    *  This ISR is used to provide signalling to processing code.    
    *  This ISR is called under 4 conditions:    
    *  1. pingRX Buffer has completed filling.        CIPR = 10h
    *  2. pongRX Buffer has completed filling.        CIPR = 20h
    *  3. pongTX Buffer has been transmitted.         CIPR = 40h
    *  4. pingTX Buffer has been transmitted.         CIPR = 80h    
    *  CIPR is read to determine the cause of the interrupt.
    */

    int edmaChannel = 0;

    edmaChannel = EDMA_RGET(CIPR);
    
    if (edmaChannel & 0x0010) {         /* pingRX full          */
        EDMA_RSET(CIPR, 0x0010);        /* Reset Pending Flag   */
        edmaBufferMask |= RXPINGMASK;
        inputReadyFlag = 1;
    }
    else if (edmaChannel & 0x0020) {    /* pongRX full          */
        EDMA_RSET(CIPR, 0x0020);        /* Reset Pending Flag   */
        edmaBufferMask |= RXPONGMASK; 
        inputReadyFlag = 1;
    }
    else if (edmaChannel & 0x0040) {    /* pongTX empty        */                                            
        EDMA_RSET(CIPR, 0x0040);        /* Reset Pending Flag   */
        edmaBufferMask |= TXPONGMASK;       
        outputReadyFlag = 1;
    }
    else if (edmaChannel & 0x0080) {    /* pingTX empty         */
        EDMA_RSET(CIPR, 0x0080);        /* Reset Pending Flag   */
        edmaBufferMask |= TXPINGMASK;               
        outputReadyFlag = 1;
    }
    else {
        EDMA_RSET(CIPR, edmaChannel);   /* Reset Pending Flag   */
    }
}