/*
* 文件名稱：DOC_Def.H
* 內容摘要：在 51 MCU 上對 DOC 進行讀、寫、擦除操作的 API 的頭文件
* 
* 當前版本：1.0
* 作    者：莊渭峰
* 完成日期：2003年2月6日
*
* 原 作 者：M-Systems 公司
* 版    本：BDK 1.25
*/

#ifndef _DOC_DEF_H_
#define _DOC_DEF_H_

/*----------- Customable Definitions ------------*/
#define EDC_MODE
/* #define DOC_VERIFY_WRITE */
/* #define DOC_IS_FIXED */
/* #define ACCESS_DOC_EXTRA */

/*-----------------------------------------------
 * Default value is 8, but for old format you may
 * use value 0
 *-----------------------------------------------*/
#define DOC_SIGN_OFFSET         8
#define SIGNATURE_LEN           8

/*------- DOC Structure Defines -----------------*/
#define CHIP_ID_DOC             0x20
#define CHIP_ID_MDOC            0x30
#define MDOC_ALIAS_RANGE       0x100
#define BUSY_DELAY             300
#define MAX_FLASH_DEVICES_DOC     16
#define MAX_FLASH_DEVICES_MDOC     2
#define MAX_DEVICE_FLOOR           4

/*-----------------------------------------------*/
#define MBYTE           0x100000L
#define KBYTE              0x400
#define PAGE_SIZE          0x200        /* 512 bytes per page     */
#define PAGE_BITS              9        /* PAGE_SIZE = ( 1 << 9 ) */
#define PAGE               0x100
#define INLV                   1
#define BLOCKS_PER_FLASH     512        /* Blocks in 2 or 4 MByte flash */
#define CHIP_SIZE       0x200000L       /* 2MBytes                            */
#define CHIP_PAGE_SIZE       256        /* 256 bytes per page on a single chip*/
#define CHIP_EXTRA_SIZE        8        /* 8 extra bytes/page on a single chip*/
#define PAGES_PER_BLOCK       16        /* 16 pages per block on a single chip*/
#define PAGES_PER_CHIP   (CHIP_SIZE / CHIP_PAGE_SIZE)
/* #define PAGE_SIZE        (INLV * CHIP_PAGE_SIZE) */
#define EXTRA_SIZE       (INLV * CHIP_EXTRA_SIZE)
#define EXTRA_LEN              8

/* EDC/ECC Syndrom */
#define SYNDROM_BYTES          6        /* Number of syndrom bytes: 5 + 1 parity */

/* Flash commands */

#define SERIAL_DATA_INPUT   0x80
#define READ_MODE           0x00
#define READ_MODE_2         0x50
#define RESET_FLASH         0xff
#define SETUP_WRITE         0x10
#define SETUP_ERASE         0x60
#define CONFIRM_ERASE       0xd0
#define READ_STATUS         0x70
#define READ_ID             0x90
#define SUSPEND_ERASE       0xb0
#define REGISTER_READ       0xe0

/* commands for moving flash pointer to areas A,B or C of page */
enum PointerOp { AREA_A = READ_MODE, AREA_B = 0x1, AREA_C = READ_MODE_2 };

/* Bits for flash status */
#define FAIL                0x01   /* error in block erase */

   /*----------------------------------------
    | Definition of DOC 2000 memory window  |
    ----------------------------------------*/

/*        DOC 2000 memory window layout :

          0000 .... 003F    IPL ROM ( part 1 )
          0040 .... 07FF       (aliased 20H times)
          0800 .... 083F    IPL ROM ( part 2 )
          0840 .... 0FFF       (aliased 20H times)
          1000              Chip Id
          1001              DOC_Status_reg
          1002              DOC_Control_reg
          1003              ASIC_Control_reg
    CDSN window ----->
          1004              CDSN_Control_reg
          1005              CDSN_Device_Selector
          1006              ECC_Config_reg
          1007              ECC_Status_reg
          1008 .... 100C    Test registers [5]
          100D              CDSN_Slow_IO_reg
          100E .... 100F    reserved ( 2 bytes )
          1010 .... 1015    ECC_Syndrom [6]
          1016 .... 103D    reserved ( 40 bytes (28) )
          103E              ROM_write_Enable
          103F              Foundry_Test_reg
          1040 .... 17FF    reserved ( 1984 bytes (7C0) )
          1800 .... 1FFF    CDSN_IO (aliased 800H times)
*/

   /*----------------------------------------
    | Definition of MDOC 2000 memory window |
    ----------------------------------------*/

/*        MDOC 2000 memory window layout :

          0000 .... 01FF    IPL SRAM ( part 1 )
          0200 .... 07FF       (aliased 4 times)
          0800 .... 0FFF    CDSN_IO (aliased 800H times)
          1000              Chip Id
          1001              DOC_Status_reg
          1002              DOC_Control_reg
          1003              ASIC_Control_reg
    CDSN window ----->
          1004              CDSN_Control_reg
          1005              CDSN_Device_Selector
          1006              ECC_Config_reg
          1007 .... 100C    reserved ( 6 bytes )
          100D              CDSN_Slow_IO_reg
          100E .... 100F    reserved ( 2 bytes )
          1010 .... 1015    ECC_Syndrom [6]
          1016 .... 101A    reserved ( 5 bytes )
          101B              Alias_Resolution_reg
          101C              Config_Input_reg
          101D              Read_Pipeline_Init_reg
          101E              Write_Pipeline_Term_reg
          101F              Last_Data_Read_reg
          1020              NOP_reg
          1021 .... 103E    reserved ( 30 bytes (1E) )
          103F              Foundry_Test_reg
          1040 .... 17FF    reserved ( 1984 bytes (7C0) )
          1800 .... 19FF    IPL SRAM ( part 1 )
          1A00 .... 1FFF       (aliased 4 times)
*/

#define NIPLpart1            0x0      /* read       */
#define NIPLpart2          0x800      /* read       */
#define NchipId           0x1000      /* read       */
#define NDOCstatus        0x1001      /* read       */
#define NDOCcontrol       0x1002      /*      write */
#define NASICselect       0x1003      /* read write */
#define Nsignals          0x1004      /* read write */
#define NdeviceSelector   0x1005      /* read write */
#define NECCconfig        0x1006      /*      write */
#define NECCstatus_DOC    0x1007      /* read       */
#define NECCstatus_MDOC   0x1006      /* read       */
#define Ntest             0x1008      /* 5 bytes till 0x100c */
#define NslowIO           0x100d      /* read write */
#define Nsyndrom          0x1010      /* read  6 bytes till 0x1015 */
#define NAliasResolution  0x101B      /* Alias_Resolution_reg */
#define NConfigInput      0x101C      /* Config_Input_reg */
#define NReadPipeInit     0x101D      /* Read_Pipeline_Init_reg */
#define NWritePipeTerm    0x101E      /* Write_Pipeline_Term_reg */
#define NLastDataRead     0x101F      /* Last_Data_Read_reg */
#define NNop              0x1020      /* NOP_reg */
#define NFoundryTest      0x103F      /* Foundry_Test_reg */
#define Nio_DOC           0x1800      /* read write  2K till 1FFF*/
#define Nio_MDOC           0x800      /* read write  2K till FFF*/

/* bits for writing to DOC2window.signals ( CDSN_Control reg ) */
#define CE                  0x01      /* 1 - Chip Enable           */
#define CLE                 0x02      /* 1 - Command Latch Enable  */
#define ALE                 0x04      /* 1 - Address Latch Enable  */
#define WP                  0x08      /* 1 - Write-Protect flash   */
#define FLASH_IO            0x10
#define ECC_IO              0x20      /* 1 - turn ECC on           */
#define PWDO                0x40

/* bits for reading from DOC2window.signals ( CDSN_Control reg ) */
#define RB                  0x80      /* 1 - ready                 */

/* bits for writing to DOC2window.ECCconfig */
#define ECC_RESET           0x00
#define ECC_IGNORE          0x01
#define ECC_RESERVED        0x02        /* reserved bits                 */
#define ECC_EN    (0x08 | ECC_RESERVED) /* 1 - enable ECC                */
#define ECC_RW    (0x20 | ECC_RESERVED) /* 1 - write mode, 0 - read mode */
/* bits for reading from DOC2window.ECCstatus or ECCconfig */
#define ECC_ERROR           0x80
#define TOGGLE              0x04        /* used for DOC 2000 detection   */

/* bits for writing to DOC2window.DOCcontrol */
#define ASIC_RESET_MODE     0x84
#define ASIC_NORMAL_MODE    0x85
#define ASIC_CHECK_RESET    0x00

#define BIG_PAGE            0x01 /* page size > 100H                     */
#define FULL_PAGE           0x02 /* full page programming ( Toshiba )    */
#define SLOW_IO             0x04 /* access to CDSN_Slow_IO before CDSN_IO */
#define MDOC_ASIC           0x08 /* MDOC asic */
#define BIG_ADDR            0x10 /* 4 byte address cycle */

#define MIN(a,b)    ((a) < (b) ? (a) : (b))
#define SWAP(t,x,y) { t = x; x = y; y = t; }

/*---------------- Low-Level Function Definitions -------------------*/
/* Warning: Unproper use of these functions may cause unrecoverable
 *          damage to the DiskOnChip !
 *-------------------------------------------------------------------*/
#ifndef DOC_IS_FIXED
FLStatus  readFlashID( byte floor,byte dev );
FLStatus  DeviceInit( void );
#endif /* DOC_IS_FIXED */

#ifdef ACCESS_DOC_EXTRA
FLStatus readDocExtra( dword blockNo, byte *sbuffer, word len );
FLStatus writeDocExtra( dword blockNo, byte *sbuffer, word len );
#endif /* ACCESS_DOC_EXTRA */

#endif /* _DOC_DEF_H_ */