/* Compare and signal float */static int emu_keb (struct pt_regs *regs, int rx, float *val) {        FP_DECL_S(SA); FP_DECL_S(SB);        FP_DECL_EX;        int IR;        FP_UNPACK_RAW_SP(SA, &current->thread.fp_regs.fprs[rx].f);        FP_UNPACK_RAW_SP(SB, val);        FP_CMP_S(IR, SA, SB, 3);        /*         * IR == -1 if DA < DB, IR == 0 if DA == DB,         * IR == 1 if DA > DB and IR == 3 if unorderded         */        emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);        if (IR == 3)                FP_SET_EXCEPTION (FP_EX_INVALID);        return _fex;}/* Convert from fixed long double */static int emu_cxfbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_Q(QR);        FP_DECL_EX;	mathemu_ldcv cvt;        __s32 si;        int mode;	mode = current->thread.fp_regs.fpc & 3;        si = regs->gprs[ry];        FP_FROM_INT_Q(QR, si, 32, int);        FP_PACK_QP(&cvt.ld, QR);        current->thread.fp_regs.fprs[rx].ui = cvt.w.high;        current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;        return _fex;}/* Convert from fixed double */static int emu_cdfbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_D(DR);        FP_DECL_EX;        __s32 si;        int mode;	mode = current->thread.fp_regs.fpc & 3;        si = regs->gprs[ry];        FP_FROM_INT_D(DR, si, 32, int);        FP_PACK_DP(&current->thread.fp_regs.fprs[rx].d, DR);        return _fex;}/* Convert from fixed float */static int emu_cefbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_S(SR);        FP_DECL_EX;        __s32 si;        int mode;	mode = current->thread.fp_regs.fpc & 3;        si = regs->gprs[ry];        FP_FROM_INT_S(SR, si, 32, int);        FP_PACK_SP(&current->thread.fp_regs.fprs[rx].f, SR);        return _fex;}/* Convert to fixed long double */static int emu_cfxbr (struct pt_regs *regs, int rx, int ry, int mask) {        FP_DECL_Q(QA);        FP_DECL_EX;	mathemu_ldcv cvt;        __s32 si;        int mode;	if (mask == 0)		mode = current->thread.fp_regs.fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        cvt.w.high = current->thread.fp_regs.fprs[ry].ui;        cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;        FP_UNPACK_QP(QA, &cvt.ld);        FP_TO_INT_ROUND_Q(si, QA, 32, 1);        regs->gprs[rx] = si;        emu_set_CC_cs(regs, QA_c, QA_s);        return _fex;}/* Convert to fixed double */static int emu_cfdbr (struct pt_regs *regs, int rx, int ry, int mask) {        FP_DECL_D(DA);        FP_DECL_EX;        __s32 si;        int mode;	if (mask == 0)		mode = current->thread.fp_regs.fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        FP_UNPACK_DP(DA, &current->thread.fp_regs.fprs[ry].d);        FP_TO_INT_ROUND_D(si, DA, 32, 1);        regs->gprs[rx] = si;        emu_set_CC_cs(regs, DA_c, DA_s);        return _fex;}/* Convert to fixed float */static int emu_cfebr (struct pt_regs *regs, int rx, int ry, int mask) {        FP_DECL_S(SA);        FP_DECL_EX;        __s32 si;        int mode;	if (mask == 0)		mode = current->thread.fp_regs.fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        FP_UNPACK_SP(SA, &current->thread.fp_regs.fprs[ry].f);        FP_TO_INT_ROUND_S(si, SA, 32, 1);        regs->gprs[rx] = si;        emu_set_CC_cs(regs, SA_c, SA_s);        return _fex;}/* Divide long double */static int emu_dxbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_Q(QA); FP_DECL_Q(QB); FP_DECL_Q(QR);        FP_DECL_EX;	mathemu_ldcv cvt;        int mode;	mode = current->thread.fp_regs.fpc & 3;        cvt.w.high = current->thread.fp_regs.fprs[rx].ui;        cvt.w.low = current->thread.fp_regs.fprs[rx+2].ui;        FP_UNPACK_QP(QA, &cvt.ld);        cvt.w.high = current->thread.fp_regs.fprs[ry].ui;        cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;        FP_UNPACK_QP(QB, &cvt.ld);        FP_DIV_Q(QR, QA, QB);        FP_PACK_QP(&cvt.ld, QR);        current->thread.fp_regs.fprs[rx].ui = cvt.w.high;        current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;        return _fex;}/* Divide double */static int emu_ddbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_DP(DA, &current->thread.fp_regs.fprs[rx].d);        FP_UNPACK_DP(DB, &current->thread.fp_regs.fprs[ry].d);        FP_DIV_D(DR, DA, DB);	FP_PACK_DP(&current->thread.fp_regs.fprs[rx].d, DR);        return _fex;}/* Divide double */static int emu_ddb (struct pt_regs *regs, int rx, double *val) {        FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_DP(DA, &current->thread.fp_regs.fprs[rx].d);        FP_UNPACK_DP(DB, val);        FP_DIV_D(DR, DA, DB);	FP_PACK_DP(&current->thread.fp_regs.fprs[rx].d, DR);        return _fex;}/* Divide float */static int emu_debr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_SP(SA, &current->thread.fp_regs.fprs[rx].f);        FP_UNPACK_SP(SB, &current->thread.fp_regs.fprs[ry].f);        FP_DIV_S(SR, SA, SB);	FP_PACK_SP(&current->thread.fp_regs.fprs[rx].f, SR);        return _fex;}/* Divide float */static int emu_deb (struct pt_regs *regs, int rx, float *val) {        FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_SP(SA, &current->thread.fp_regs.fprs[rx].f);        FP_UNPACK_SP(SB, val);        FP_DIV_S(SR, SA, SB);	FP_PACK_SP(&current->thread.fp_regs.fprs[rx].f, SR);        return _fex;}/* Divide to integer double */static int emu_didbr (struct pt_regs *regs, int rx, int ry, int mask) {        display_emulation_not_implemented(regs, "didbr");        return 0;}/* Divide to integer float */static int emu_diebr (struct pt_regs *regs, int rx, int ry, int mask) {        display_emulation_not_implemented(regs, "diebr");        return 0;}/* Extract fpc */static int emu_efpc (struct pt_regs *regs, int rx, int ry) {        regs->gprs[rx] = current->thread.fp_regs.fpc;        return 0;}/* Load and test long double */static int emu_ltxbr (struct pt_regs *regs, int rx, int ry) {        s390_fp_regs *fp_regs = &current->thread.fp_regs;	mathemu_ldcv cvt;        FP_DECL_Q(QA);        FP_DECL_EX;        cvt.w.high = current->thread.fp_regs.fprs[ry].ui;        cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;        FP_UNPACK_QP(QA, &cvt.ld);        fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;        fp_regs->fprs[rx+2].ui = fp_regs->fprs[ry+2].ui;        emu_set_CC_cs(regs, QA_c, QA_s);        return _fex;}/* Load and test double */static int emu_ltdbr (struct pt_regs *regs, int rx, int ry) {        s390_fp_regs *fp_regs = &current->thread.fp_regs;        FP_DECL_D(DA);        FP_DECL_EX;        FP_UNPACK_DP(DA, &fp_regs->fprs[ry].d);        fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;        emu_set_CC_cs(regs, DA_c, DA_s);        return _fex;}/* Load and test double */static int emu_ltebr (struct pt_regs *regs, int rx, int ry) {        s390_fp_regs *fp_regs = &current->thread.fp_regs;        FP_DECL_S(SA);        FP_DECL_EX;        FP_UNPACK_SP(SA, &fp_regs->fprs[ry].f);        fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;        emu_set_CC_cs(regs, SA_c, SA_s);        return _fex;}/* Load complement long double */static int emu_lcxbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_Q(QA); FP_DECL_Q(QR);        FP_DECL_EX;	mathemu_ldcv cvt;        int mode;	mode = current->thread.fp_regs.fpc & 3;        cvt.w.high = current->thread.fp_regs.fprs[ry].ui;        cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;        FP_UNPACK_QP(QA, &cvt.ld);	FP_NEG_Q(QR, QA);        FP_PACK_QP(&cvt.ld, QR);        current->thread.fp_regs.fprs[rx].ui = cvt.w.high;        current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;        emu_set_CC_cs(regs, QR_c, QR_s);        return _fex;}/* Load complement double */static int emu_lcdbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_D(DA); FP_DECL_D(DR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_DP(DA, &current->thread.fp_regs.fprs[ry].d);	FP_NEG_D(DR, DA);	FP_PACK_DP(&current->thread.fp_regs.fprs[rx].d, DR);        emu_set_CC_cs(regs, DR_c, DR_s);        return _fex;}/* Load complement float */static int emu_lcebr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_S(SA); FP_DECL_S(SR);        FP_DECL_EX;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_SP(SA, &current->thread.fp_regs.fprs[ry].f);	FP_NEG_S(SR, SA);	FP_PACK_SP(&current->thread.fp_regs.fprs[rx].f, SR);        emu_set_CC_cs(regs, SR_c, SR_s);        return _fex;}/* Load floating point integer long double */static int emu_fixbr (struct pt_regs *regs, int rx, int ry, int mask) {        s390_fp_regs *fp_regs = &current->thread.fp_regs;        FP_DECL_Q(QA);        FP_DECL_EX;	mathemu_ldcv cvt;        __s32 si;        int mode;	if (mask == 0)		mode = fp_regs->fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        cvt.w.high = fp_regs->fprs[ry].ui;        cvt.w.low = fp_regs->fprs[ry+2].ui;        FP_UNPACK_QP(QA, &cvt.ld);	FP_TO_FPINT_ROUND_Q(QA);	FP_PACK_QP(&cvt.ld, QA);	fp_regs->fprs[rx].ui = cvt.w.high;	fp_regs->fprs[rx+2].ui = cvt.w.low;        return _fex;}/* Load floating point integer double */static int emu_fidbr (struct pt_regs *regs, int rx, int ry, int mask) {	/* FIXME: rounding mode !! */        s390_fp_regs *fp_regs = &current->thread.fp_regs;        FP_DECL_D(DA);        FP_DECL_EX;        __s32 si;        int mode;	if (mask == 0)		mode = fp_regs->fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        FP_UNPACK_DP(DA, &fp_regs->fprs[ry].d);	FP_TO_FPINT_ROUND_D(DA);	FP_PACK_DP(&fp_regs->fprs[rx].d, DA);        return _fex;}/* Load floating point integer float */static int emu_fiebr (struct pt_regs *regs, int rx, int ry, int mask) {        s390_fp_regs *fp_regs = &current->thread.fp_regs;        FP_DECL_S(SA);        FP_DECL_EX;        __s32 si;        int mode;	if (mask == 0)		mode = fp_regs->fpc & 3;	else if (mask == 1)		mode = FP_RND_NEAREST;	else		mode = mask - 4;        FP_UNPACK_SP(SA, &fp_regs->fprs[ry].f);	FP_TO_FPINT_ROUND_S(SA);	FP_PACK_SP(&fp_regs->fprs[rx].f, SA);        return _fex;}/* Load lengthened double to long double */static int emu_lxdbr (struct pt_regs *regs, int rx, int ry) {        FP_DECL_D(DA); FP_DECL_Q(QR);	FP_DECL_EX;	mathemu_ldcv cvt;        int mode;	mode = current->thread.fp_regs.fpc & 3;        FP_UNPACK_DP(DA, &current->thread.fp_regs.fprs[ry].d);	FP_CONV (Q, D, 4, 2, QR, DA);        FP_PACK_QP(&cvt.ld, QR);        current->thread.fp_regs.fprs[rx].ui = cvt.w.high;        current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;        return _fex;}/* Load lengthened double to long double */static int emu_lxdb (struct pt_regs *regs, int rx, double *val) {