/*******************************************************************************
*** Note: Copy rights resevered to Beijing Pacific Linkair Communications Co. 
***
*** File Name: Eeprom.h
*** Purpose  : EEPROM Accessing Layer and some other Definitions 
***
*** Author   : Guangzhao Tian
*** Modified : By Guangzhao Tian at 2000/9/7
***
**/

#define EEPROM_TIMEOUT		20	 /* NIC_Delay(EEPROM_TIMEOUT) usec */
#define EEPROM_WAITTIMES    5    /* no more than EEPROM_WAITTIMES loop, that's 
                                  EEPROM_WAITTIMES * NIC_Delay(EEPROM_TIMEOUT), 
                                  long enough for any EEPROM command finish,
                                 which is no longer than 11ms (write and erase) */

/****************************************************************
*** Fllowing are EEPROM Contents registers
**/

 /* 3Com Node Address */
#define EEPROM_NODE_ADDRESS_WORD_0		0x00
#define EEPROM_NODE_ADDRESS_WORD_1		0x01
#define EEPROM_NODE_ADDRESS_WORD_2		0x02

#define EEPROM_DEVICE_ID			    0x03
/*  Possible values:
        0x9055 - PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX connector.
        0x9056 - PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4 connector.
        0x9004 - PCI 10BASE-T (TPO)
        0x9005 - PCI 10BASE-T/10BASE-2/AUI(COMBO)
        0x9006 - PCI 10BASE-T/10BASE-2/(TPC)
*/
#define EEPROM_MANUFACTURING_DATE	    	0x04
#define EEPROM_MANUFACTURING_DIVISION		0x05
#define EEPROM_MANUFACTURING_PRODUCT_CODE	0x06 

#define EEPROM_MANUFACTURING_ID			    0x07   /* value==0x6d50 */

#define EEPROM_PCI_PARAMETERS_1			    0x08
     /*define bits of EEPROM_PCI_PARAMETERS_1 registers*/
        #define EEPROM_PCI_PARAMETERS_Fast                 0x0001; /* bit0 differnt in*/
        #define EEPROM_PCI_PARAMETERS_d3Hot                0x0001; /* differnt NICs */
        #define EEPROM_PCI_PARAMETERS_Lower1Meg            0x0002;
        #define EEPROM_PCI_PARAMETERS_DisableMemoryBase    0x0004;
        #define EEPROM_PCI_PARAMETERS_D3SupportCold        0x0008;
        #define EEPROM_PCI_PARAMETERS_D1Support            0x0010;
        #define EEPROM_PCI_PARAMETERS_D2Support            0x0020;
        #define EEPROM_PCI_PARAMETERS_MinimumGrant         0x03c0;
        #define EEPROM_PCI_PARAMETERS_MaximumLatency       0xfc00;

#define EEPROM_ROM_INFORMATION			    0x09 /*value == 0x0000*/

/****** OEM Node address */
#define EEPROM_OEM_NODE_ADDRESS_WORD_0		0x0A
#define EEPROM_OEM_NODE_ADDRESS_WORD_1		0x0B
#define EEPROM_OEM_NODE_ADDRESS_WORD_2		0x0C

#define EEPROM_SOFTWARE_INFORMATION_1		0x0D
    #define EEPROM_SOFTINFO1_LINKBEATDISABLED       BIT_14
	#define EEPROM_SOFTINFO1_FULLDUPLEXENABLED      BIT_15

#define EEPROM_COMPATABILITY_WORD 		    0x0E
     /* #define EEPROM_COMPATABILITY_LEVEL		0x00 */
 
#define EEPROM_SOFTWARE_INFORMATION_2	    0x0F
       /*#define ENABLE_MWI_WORK			        0x0020*/

#define EEPROM_CAPABILITIES_WORD		    0x10
	/* Bits in the capabilities word */
 	#define EEPROM_CAPABILITIES_PNP		        0x0001
	#define EEPROM_CAPABILITIES_FULL_DUPLEX	    0x0002
	#define EEPROM_CAPABILITIES_LARGE_PKTS	    0x0004
	#define EEPROM_CAPABILITIES_SLAVE_DMA	    0x0008
	#define EEPROM_CAPABILITIES_SECOND_DMA	    0x0010
	#define EEPROM_CAPABILITIES_FULL_BM		    0x0020
	#define EEPROM_CAPABILITIES_FRAG_BM		    0x0040
	#define EEPROM_CAPABILITIES_CRC_PASSTHRU	0x0080
	#define EEPROM_CAPABILITIES_TXDONE		    0x0100
	#define EEPROM_CAPABILITIES_NO_TXLENGTH	    0x0200
	#define EEPROM_CAPABILITIES_RX_REPEAT	    0x0400
	#define EEPROM_CAPABILITIES_SNOOPING	    0x0800
	#define EEPROM_CAPABILITIES_100MBPS		    0x1000
	#define EEPROM_CAPABILITIES_PWRMGMT		    0x2000

#define EEPROM_RESERVED_LOCATION		   0x11

#define EEPROM_INTERNAL_CONFIG_WORD_0	   0x12
#define EEPROM_INTERNAL_CONFIG_WORD_1	   0x13

#define EEPROM_ANALOG_DIAGNOSTICS		   0x14
#define EEPROM_SOFTWARE_INFORMATION_3	   0x15
	#define EEPROM_GENERIC_MII                  0x00
    #define EEPROM_100BASE_T4_MII               0x01
    #define EEPROM_10BASE_T_MII                 0x02         
    #define EEPROM_100BASE_TX_MII               0x03
    #define EEPROM_10_BASE_T_AUTONEGOTIATION    0x04
    #define EEPROM_100_BASE_TX_AUTONEGOTIATION  0x04                  

/* Cyclone NICs Specific Registers*/
#define EEPROM_LANWORKS_DATA               0x16  /*LAN Works Data*/ 
#define EEPROM_SUBVENDORID                 0x17  /*Subsystem Vendor ID, that's 10b7*/
#define EEPROM_SUBSYSTEMID                 0x18  /*Subsytem ID*/
#define EEPROM_MEDIAOPTIONS                0x19  /*Media Options*/
/***end of Cyclone Specific Regs***/
  
/** Locations 0x1E - 0x1F are reserved. */

#define EEPROM_CHECKSUM_1			       0x20

/***
********* end of EEPROM Contents *********
***/

/********* Followings are definitions not used yet *******************/
/*Locations 0x21 - 0x2F are reserved.*/
#define EEPROM_SOS_PINS_1_TO_4			0x21
#define EEPROM_SOS_PINS_5_TO_7			0x22

/* Locations 0x00 - 0xFD are flexible format locations (4kb EEPROMs)*/
#define EEPROM_CHECKSUM_2_UPPER			0xFE
#define EEPROM_CHECKSUM_2_LOWER			0xFF

/* Locations 0x00 - 0x3FD are flexible format locations (16Kb EEPROMs)*/
#define EEPROM_CHECKSUM_3_UPPER                0x3FE
#define EEPROM_CHECKSUM_3_LOWER                0x3FF
#define EEPROM_COMMAND_MASK			0xE000
#define EEPROM_COMMAND_AUTOINIT_DONE		0xE000
#define EEPROM_COMMAND_PCI_CONFIG_WRITE		0xA000
#define EEPROM_COMMAND_REGISTER_WRITE		0x6000
#define EEPROM_COMMAND_TX_FIFO_WRITE		0x2000
#define EEPROM_CURRENT_WINDOW_MASK		0x7000
#define EEPROM_ADDRESS_MASK			0x00FF
#define EEPROM_TX_BYTE_COUNT			0x03FF
#define EEPROM_FLEXIBLE_FORMAT_START		0x40
#define EEPROM_WORD_ACCESS			0x1000

#define MAX_FLEX_EEPROM_SIZE			2048

#define EEPROM_WINDOW_0				(0x0 << 0x8)
#define EEPROM_WINDOW_1				(0x1 << 0x8)
#define EEPROM_WINDOW_2				(0x2 << 0x8)	
#define EEPROM_WINDOW_3				(0x3 << 0x8)
#define EEPROM_WINDOW_4				(0x4 << 0x8)
#define EEPROM_WINDOW_5				(0x5 << 0x8)	
#define EEPROM_WINDOW_6				(0x6 << 0x8)
#define EEPROM_WINDOW_7				(0x7 << 0x8)

/***
******  End of EEPROM.h ****** 
**********************************************************************/