MAX_FLW .set 10000 ;Allow only 10000 flw pulses.
INV_ER .set 018h ;INVERSE ERASE COMMAND WORD
FLWR .set 6 ;FLASH WRITE COMMAND WORD
FLWR_EX .set 047h ;FLASH WRITE EXEBIN COMMAND WORD
STOP .set 0 ;RESET REGISTER COMMAND WORD

        .sect "fl_wrt"
******************************************************
* FLWS: This routine is used to check for bits *
* in depletion mode. If any are found, flash– *
* write is used to recover. *
* AR1 Flash–write pulse count. *
* AR2 Used for main banz loop. *
* BASE_0 Parameter passed to Set_mode. *
* BASE_1 Used for flash address. *
* BASE_2 Used for flash data. *
******************************************************
FLWS:
******************************************************
* Code initialization section *
* Initialize test loop counters: *
* AR1 is the number of flash–write pulses. *
******************************************************
         SETC INTM ;Disable maskable ints.
         LACL SEG_ST ;Get segment start address.
         AND #04000h ;Get array start address.
         SACL FL_ST ;Save array start address.
         SPLK #0,ERROR ;Reset error flag.
         LAR AR1,#0 ;Set FLW count to 0.
         SPLK #STOP,BASE_0 ;Flash STOP command.
         CALL SET_MODEfl ;Disable any flash commands.
INV_ERASE:
         SPLK #INV_ER,BASE_0
         CALL SET_MODEfl ;Set inverse–erase mode.
         BLDD #FL_ST,BASE_1 ;Array start address.
         LAR AR2,#31 ;Loop count.
         MAR *,AR2
NEXT_IVERS:
         LACL BASE_1 ;Get address.
         TBLR BASE_2 ;Dummy read.
         TBLR BASE_2 ;Dummy read.
         TBLR BASE_2 ;Read data.
         ADD #1 ;Increment address.
         SACL BASE_1 ;Save address.
         ZAC
         ADD BASE_2 ;Add data.
         BCND FL_WRITE, NEQ ;If ACC<>0, then flwrite.
*Else, continue until until done with row.
         BANZ NEXT_IVERS ;Loop 32 times.
         SPLK #STOP,BASE_0 ;Flash STOP command.
         CALL SET_MODEfl ;Disable flash commands.
;If here then test passed.
DONEfl:    RET ;Return to calling code.
* If here, then an error has occurred.
EXITfl:    SPLK #1,ERROR ;Update error flag
         SPLK #STOP,BASE_0 ;Flash STOP command.
         CALL SET_MODEfl ;Disable flash commands.
         CALL ARRAY ;ACCESS FLASH ARRAY
         B DONEfl ;Get outa here.
***************************************************
* FL_WRITE: This routine performs a fl_write on *
* the flash until a maximum is reached. The *
* array is defined by the variable FL_ST *
* and the segment(s) is defined by the PROTECT *
* mask. The following resources are used for *
* temporary storage: *
* AR0 Used for comparison *
* AR1 Used for pulse count (Global) *
* AR6 Parameter passed to DELAY *
* BASE_0 Parameter passed to SET_MODE *
* BASE_2 Used for flw cmd *
* BASE_3 Used for EXE + flw cmd *
***************************************************
FL_WRITE:
         SPLK #STOP,BASE_0 ;Flash STOP command.
         CALL SET_MODEfl ;Disable flash commands.
         LACL PROTECT ;Get sector_prot mask.
         OR #FLWR ;Or in fl_write cmd.
         SACL BASE_2 ;BASE_2 = fl_write cmd.
         OR #FLWR_EX ;Or in EXE + fl_write cmd.
         SACL BASE_3 ;BASE_3 = EXE + fl_write cmd.
*Set the flash–write command.
         CALL REGS ;Access flash regs.
         LACC FL_ST ;ACC => SEG_CTL.
         TBLW BASE_2 ;Initiate fl_write.
         LAR AR6,#D10 ;Set delay.
         CALL DELAY,*,AR6 ;Wait,10US flw stabilization time.
*Set the EXE bit (start flash–write pulse).
         TBLW BASE_3 ;Start flw pulse.
         LAR AR6,#D7K ;Set delay to 7 ms.
         CALL DELAY,*,AR6 ;WAIT,7 ms.
         LAR AR6,#D7K ;Set delay to 7 ms.
         CALL DELAY,*,AR6 ;WAIT 7 ms.
*A 14–mS flash write pulse has been applied.
         SPLK #STOP,BASE_0 ;Flash STOP command.
         CALL SET_MODEfl ;Disable flash commands.
         MAR *,AR1
         MAR *+ ;Increment flw count. 
         LAR AR0,#MAX_FLW
         CMPR 2 ;If AR1>MAX_FLW then
         BCND EXITfl,TC ;Fail, don’t continue recovery.
         B INV_ERASE ;Else, perform iverase again.
**************************************************
* SET_MODE: This routine sets the flash in the *
* mode specified by the contents of BASE_0. This *
* can be used for VER0,VER1,INVERASE,or STOP. *
**************************************************
SET_MODEfl:
         CALL REGS ;ACCESS FLASH REGS
         LACL FL_ST ;ACC => SEG_CTR.
         TBLW BASE_0 ;Activate MODE.
         LAR AR6,#D10 ;SET DELAY
         CALL DELAY,*,AR6 ;WAIT
         CALL ARRAY ;ACCESS FLASH ARRAY
         RET