?? 240x.h
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/* file 'Regs2407.h' to setup the addresses of the TMS240LF2407 */
/* memory mapped peripheral register set */
/* version 2.0 date : 03.07.2000 Bormann */
/* Improvement : */
/* DEFINE statements instead of pointer ( see Version 1.0) */
/* Advantage : no additional data-memory required */
/* the syntax in Code-Composers watch-window is : */
/* *(int *)0x7018@data,x ; SCSR1 to watch the SCSR1 -Register */
/* file still to be cross-verified/ tested */
#define IMR *(volatile unsigned int *)0x0004 /* CPU Interrupt Mask Register */
#define GREG *(volatile unsigned int *)0x0005 /* Global Data Memory Configuration Register */
#define IFR *(volatile unsigned int *)0x0006 /* CPU Interrupt Flag Register */
#define PIRQR0 *(volatile unsigned int *)0x7010 /* Peripheral Interrupt Request Register 0 */
#define PIRQR1 *(volatile unsigned int *)0x7011 /* Peripheral Interrupt Request Register 1 */
#define PIRQR2 *(volatile unsigned int *)0x7012 /* Peripheral Interrupt Request Register 2 */
#define PIACKR0 *(volatile unsigned int *)0x7014 /* Peripheral Interrupt Acknowledge Register 0 */
#define PIACKR1 *(volatile unsigned int *)0x7015 /* Peripheral Interrupt Acknowledge Register 1 */
#define PIACKR2 *(volatile unsigned int *)0x7016 /* Peripheral Interrupt Acknowledge Register 2 */
#define SCSR1 *(volatile unsigned int *)0x7018 /* System Control and Status Register 1 */
#define SCSR2 *(volatile unsigned int *)0x7019 /* System Control and Status Register 2 */
#define DINR *(volatile unsigned int *)0x701C /* Device Identification Name Register */
#define PIVR *(volatile unsigned int *)0x701E /* Peripheral Interrupt Vector Register */
#define WDCNTR *(volatile unsigned int *)0x7023 /* Watchdog Counter Register */
#define WDKEY *(volatile unsigned int *)0x7025 /* Watchdog Reset Key Register */
#define WDCR *(volatile unsigned int *)0x7029 /* Watchdog Timer Control Register */
#define SPICCR *(volatile unsigned int *)0x7040 /* SPI Configuration Control Register */
#define SPICTL *(volatile unsigned int *)0x7041 /* SPI Operation Control Register */
#define SPISTS *(volatile unsigned int *)0x7042 /* SPI Status Register */
#define SPIBRR *(volatile unsigned int *)0x7044 /* SPI Baud Rate Control Register */
#define SPIRXEMU *(volatile unsigned int *)0x7046 /* SPI Emulation Buffer Register */
#define SPIRXBUF *(volatile unsigned int *)0x7047 /* SPI Serial Receive Buffer Register */
#define SPITXBUF *(volatile unsigned int *)0x7048 /* SPI Serial Transmit Buffer Register */
#define SPIDAT *(volatile unsigned int *)0x7049 /* SPI Serial Data Register */
#define SPIPRI *(volatile unsigned int *)0x704F /* SPI Priority Control Register */
#define SCICCR *(volatile unsigned int *)0x7050 /* SCI Communication Control Register */
#define SCICTL1 *(volatile unsigned int *)0x7051 /* SCI Control Register 1 */
#define SCIHBAUD *(volatile unsigned int *)0x7052 /* SCI Baud-Select Register, High-Bits */
#define SCILBAUD *(volatile unsigned int *)0x7053 /* SCI Baud-Select Register, Low-Bits */
#define SCICTL2 *(volatile unsigned int *)0x7054 /* SCI Control Register 2 */
#define SCIRXST *(volatile unsigned int *)0x7055 /* SCI Receiver Status Register */
#define SCIRXEMU *(volatile unsigned int *)0x7056 /* SCI Emulation Data Buffer Register */
#define SCIRXBUF *(volatile unsigned int *)0x7057 /* SCI Receiver Data Buffer Register */
#define SCITXBUF *(volatile unsigned int *)0x7059 /* SCI Transmit Data Buffer Register */
#define SCIPC2 *(volatile unsigned int *)0x705E /* SCI Port Control Regester */
#define SCIPRI *(volatile unsigned int *)0x705F /* SCI Priority Control Register */
#define XINT1CR *(volatile unsigned int *)0x7070 /* External Interrupt 1 Control Register*/
#define XINT2CR *(volatile unsigned int *)0x7071 /* External Interrupt 2 Control Register*/
#define MCRA *(volatile unsigned int *)0x7090 /* I/O Mux Control Register A */
#define MCRB *(volatile unsigned int *)0x7092 /* I/O Mux Control Register B */
#define MCRC *(volatile unsigned int *)0x7094 /* I/O Mux Control Register C */
#define PEDATDIR *(volatile unsigned int *)0x7095 /* I/O PORT E Data and Direction Register */
#define PFDATDIR *(volatile unsigned int *)0x7096 /* I/O PORT F Data and Direction Register */
#define PADATDIR *(volatile unsigned int *)0x7098 /* I/O Port A Data and Direction Register */
#define PBDATDIR *(volatile unsigned int *)0x709a /* I/O Port B Data and Direction Register */
#define PCDATDIR *(volatile unsigned int *)0x709c /* I/O Port C Data and Direction Register */
#define PDDATDIR *(volatile unsigned int *)0x709e /* I/O Port D Data and Direction Register */
#define ADCTRL1 *(volatile unsigned int *)0x70a0 /* ADC Control Register 1 */
#define ADCTRL2 *(volatile unsigned int *)0x70a1 /* ADC Control Register 2 */
#define MAXCONV *(volatile unsigned int *)0x70a2 /* ADC Maximum Conversion Register */
#define CHSELSEQ1 *(volatile unsigned int *)0x70a3 /* ADC Channel Select Sequencing Control 1 */
#define CHSELSEQ2 *(volatile unsigned int *)0x70a4 /* ADC Channel Select Sequencing Control 2 */
#define CHSELSEQ3 *(volatile unsigned int *)0x70a5 /* ADC Channel Select Sequencing Control 3 */
#define CHSELSEQ4 *(volatile unsigned int *)0x70a6 /* ADC Channel Select Sequencing Control 4 */
#define AUTO_SEQ_SR *(volatile unsigned int *)0x70a7 /* ADC Auto Sequence Status Register */
#define RESULT0 *(volatile unsigned int *)0x70a8 /* ADC Result Register 0 */
#define RESULT1 *(volatile unsigned int *)0x70a9 /* ADC Result Register 1 */
#define RESULT2 *(volatile unsigned int *)0x70aa /* ADC Result Register 2 */
#define RESULT3 *(volatile unsigned int *)0x70ab /* ADC Result Register 3 */
#define RESULT4 *(volatile unsigned int *)0x70ac /* ADC Result Register 4 */
#define RESULT5 *(volatile unsigned int *)0x70ad /* ADC Result Register 5 */
#define RESULT6 *(volatile unsigned int *)0x70ae /* ADC Result Register 6 */
#define RESULT7 *(volatile unsigned int *)0x70af /* ADC Result Register 7 */
#define RESULT8 *(volatile unsigned int *)0x70b0 /* ADC Result Register 8 */
#define RESULT9 *(volatile unsigned int *)0x70b1 /* ADC Result Register 9 */
#define RESULT10 *(volatile unsigned int *)0x70b2 /* ADC Result Register 10 */
#define RESULT11 *(volatile unsigned int *)0x70b3 /* ADC Result Register 11 */
#define RESULT12 *(volatile unsigned int *)0x70b4 /* ADC Result Register 12 */
#define RESULT13 *(volatile unsigned int *)0x70b5 /* ADC Result Register 13 */
#define RESULT14 *(volatile unsigned int *)0x70b6 /* ADC Result Register 14 */
#define RESULT15 *(volatile unsigned int *)0x70b7 /* ADC Result Register 15 */
#define CALIBRATION *(volatile unsigned int *)0x70b8 /* ADC Calibration Register */
#define CAN_MDER *(volatile unsigned int *)0x7100 /* CAN Mailbox Direction/Enable Register */
#define CAN_TCR *(volatile unsigned int *)0x7101 /* CAN Transmission Control Register */
#define CAN_RCR *(volatile unsigned int *)0x7102 /* CAN Receiver Control Register */
#define CAN_MCR *(volatile unsigned int *)0x7103 /* CAN Master Control Register */
#define CAN_BCR2 *(volatile unsigned int *)0x7104 /* CAN Bit Configuration Register 2 */
#define CAN_BCR1 *(volatile unsigned int *)0x7105 /* CAN Bit Configuration Register 1 */
#define CAN_ESR *(volatile unsigned int *)0x7106 /* CAN Error Status Register */
#define CAN_GSR *(volatile unsigned int *)0x7107 /* CAN Global Status Register */
#define CAN_CEC *(volatile unsigned int *)0x7108 /* CAN Error Counter Register */
#define CAN_IFR *(volatile unsigned int *)0x7109 /* CAN Interrupt Flag Register */
#define CAN_IMR *(volatile unsigned int *)0x710a /* CAN Interrupt Mask Register */
#define CAN_LAM0_H *(volatile unsigned int *)0x710b /* CAN Local Acceptance Mask MB0 and MB1 high */
#define CAN_LAM0_L *(volatile unsigned int *)0x710c /* CAN Local Acceptance Mask MB0 and MB1 low */
#define CAN_LAM1_H *(volatile unsigned int *)0x710d /* CAN Local Acceptance Mask MB3 and MB2 high */
#define CAN_LAM1_L *(volatile unsigned int *)0x710e /* CAN Local Acceptance Mask MB3 and MB2 low */
#define CAN_MSGID0L *(volatile unsigned int *)0x7200 /* CAN Message ID for MB0 , low */
#define CAN_MSGID0H *(volatile unsigned int *)0x7201 /* CAN Message ID for MB0 , high */
#define CAN_MSGCTRL0 *(volatile unsigned int *)0x7202 /* CAN Message Control Field 0 */
#define CAN_MBX0A *(volatile unsigned int *)0x7204 /* CAN 2 of 8 Bytes of Mailbox 0 */
#define CAN_MBX0B *(volatile unsigned int *)0x7205 /* CAN 2 of 8 Bytes of Mailbox 0 */
#define CAN_MBX0C *(volatile unsigned int *)0x7206 /* CAN 2 of 8 Bytes of Mailbox 0 */
#define CAN_MBX0D *(volatile unsigned int *)0x7207 /* CAN 2 of 8 Bytes of Mailbox 0 */
#define CAN_MSGID1L *(volatile unsigned int *)0x7208 /* CAN Message ID for MB1 , low */
#define CAN_MSGID1H *(volatile unsigned int *)0x7209 /* CAN Message ID for MB1 , high */
#define CAN_MSGCTRL1 *(volatile unsigned int *)0x720A /* CAN Message Control Field 1 */
#define CAN_MBX1A *(volatile unsigned int *)0x720C /* CAN 2 of 8 Bytes of Mailbox 1 */
#define CAN_MBX1B *(volatile unsigned int *)0x720D /* CAN 2 of 8 Bytes of Mailbox 1 */
#define CAN_MBX1C *(volatile unsigned int *)0x720E /* CAN 2 of 8 Bytes of Mailbox 1 */
#define CAN_MBX1D *(volatile unsigned int *)0x720F /* CAN 2 of 8 Bytes of Mailbox 1 */
#define CAN_MSGID2L *(volatile unsigned int *)0x7210 /* CAN Message ID for MB2 , low */
#define CAN_MSGID2H *(volatile unsigned int *)0x7211 /* CAN Message ID for MB2 , high */
#define CAN_MSGCTRL2 *(volatile unsigned int *)0x7212 /* CAN Message Control Field 2 */
#define CAN_MBX2A *(volatile unsigned int *)0x7214 /* CAN 2 of 8 Bytes of Mailbox 2 */
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