?? s03_04.htm
字號:
<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><HTML><HEAD><TITLE>80386 Programmer's Reference Manual -- Section 3.4</TITLE></HEAD><BODY><B>up:</B> <A HREF="c03.htm">Chapter 3 -- Applications Instruction Set</A><BR><B>prev:</B> <A HREF="s03_03.htm">3.3 Decimal Arithmetic Instructions</A><BR><B>next:</B> <A HREF="s03_05.htm">3.5 Control Transfer Instructions</A><P><HR><P><H1>3.4 Logical Instructions</H1>The group of logical instructions includes:<UL><LI> The Boolean operation instructions<LI> Bit test and modify instructions<LI> Bit scan instructions<LI> Rotate and shift instructions<LI> Byte set on condition</UL><H2>3.4.1 Boolean Operation Instructions</H2>The logical operations are <A HREF="AND.htm">AND</A>, <A HREF="OR.htm">OR</A>, <A HREF="XOR.htm">XOR</A>, and <A HREF="NOT.htm">NOT</A>.<P><A HREF="NOT.htm">NOT</A> (Not) inverts the bits in the specified operand to form a one'scomplement of the operand. The <A HREF="NOT.htm">NOT</A> instruction is a unary operation thatuses a single operand in a register or memory. <A HREF="NOT.htm">NOT</A> has no effect on theflags.<P>The <A HREF="AND.htm">AND</A>, <A HREF="OR.htm">OR</A>, and <A HREF="XOR.htm">XOR</A> instructions perform the standard logical operations"and", "(inclusive) or", and "exclusive or". These instructions can use thefollowing combinations of operands:<UL><LI> Two register operands<LI> A general register operand with a memory operand<LI> An immediate operand with either a general register operand or amemory operand.</UL><A HREF="AND.htm">AND</A>, <A HREF="OR.htm">OR</A>, and <A HREF="XOR.htm">XOR</A> clear OF and CF, leave AF undefined, and update SF, ZF, and PF.<H2>3.4.2 Bit Test and Modify Instructions</H2>This group of instructions operates on a single bit which can be in memoryor in a general register. The location of the bit is specified as an offsetfrom the low-order end of the operand. The value of the offset either may begiven by an immediate byte in the instruction or may be contained in ageneral register.<P>These instructions first assign the value of the selected bit to CF, thecarry flag. Then a new value is assigned to the selected bit, as determinedby the operation. OF, SF, ZF, AF, PF are left in an undefined state. Table3-1 defines these instructions.<PRE>Table 3-1. Bit Test and Modify InstructionsInstruction Effect on CF Effect on Selected BitBit (Bit Test) CF := BIT (none)BTS (Bit Test and Set) CF := BIT BIT := 1BTR (Bit Test and Reset) CF := BIT BIT := 0BTC (Bit Test and Complement) CF := BIT BIT := NOT(BIT)</PRE><H2>3.4.3 Bit Scan Instructions</H2>These instructions scan a word or doubleword for a one-bit and store theindex of the first set bit into a register. The bit string being scannedmay be either in a register or in memory. The ZF flag is set if the entireword is zero (no set bits are found); ZF is cleared if a one-bit is found.If no set bit is found, the value of the destination register is undefined.<P><A HREF="BSF.htm">BSF</A> (Bit Scan Forward) scans from low-order to high-order (starting from bit index zero).<P><A HREF="BSR.htm">BSR</A> (Bit Scan Reverse) scans from high-order to low-order (starting frombit index 15 of a word or index 31 of a doubleword).<H2>3.4.4 Shift and Rotate Instructions</H2>The shift and rotate instructions reposition the bits within the specifiedoperand.<P>These instructions fall into the following classes:<UL><LI> Shift instructions<LI> Double shift instructions<LI> Rotate instructions</UL><H3>3.4.4.1 Shift Instructions</H3>The bits in bytes, words, and doublewords may be shifted arithmetically orlogically. Depending on the value of a specified count, bits can be shiftedup to 31 places.<P>A shift instruction can specify the count in one of three ways. One form ofshift instruction implicitly specifies the count as a single shift. Thesecond form specifies the count as an immediate value. The third formspecifies the count as the value contained in CL. This last form allows theshift count to be a variable that the program supplies during execution.Only the low order 5 bits of CL are used.<P>CF always contains the value of the last bit shifted out of the destinationoperand. In a single-bit shift, OF is set if the value of the high-order(sign) bit was changed by the operation. Otherwise, OF is cleared. Followinga multibit shift, however, the content of OF is always undefined.<P>The shift instructions provide a convenient way to accomplish division ormultiplication by binary power. Note however that division of signed numbersby shifting right is not the same kind of division performed by the <A HREF="IDIV.htm">IDIV</A> instruction.<P><A HREF="SAL.htm">SAL</A> (Shift Arithmetic Left) shifts the destination byte, word, ordoubleword operand left by one or by the number of bits specified in thecount operand (an immediate value or the value contained in CL). Theprocessor shifts zeros in from the right (low-order) side of the operand asbits exit from the left (high-order) side. See <A HREF="#fig3-6">Figure 3-6</A>.<P><A HREF="SAL.htm">SHL</A> (Shift Logical Left) is a synonym for <A HREF="SAL.htm">SAL</A> (refer to <A HREF="SAL.htm">SAL</A>).<P><A HREF="SAL.htm">SHR</A> (Shift Logical Right) shifts the destination byte, word, or doublewordoperand right by one or by the number of bits specified in the count operand(an immediate value or the value contained in CL). The processor shiftszeros in from the left side of the operand as bits exit from the right side.See <A HREF="#fig3-7">Figure 3-7</A>.<P><A HREF="SAL.htm">SAR</A> (Shift Arithmetic Right) shifts the destination byte, word, ordoubleword operand to the right by one or by the number of bits specified inthe count operand (an immediate value or the value contained in CL). Theprocessor preserves the sign of the operand by shifting in zeros on the left(high-order) side if the value is positive or by shifting by ones if thevalue is negative. See <A HREF="#fig3-8">Figure 3-8</A>.<P>Even though this instruction can be used to divide integers by a power oftwo, the type of division is not the same as that produced by the <A HREF="IDIV.htm">IDIV</A>instruction. The quotient of <A HREF="IDIV.htm">IDIV</A> is rounded toward zero, whereas the"quotient" of <A HREF="SAL.htm">SAR</A> is rounded toward negative infinity. This difference isapparent only for negative numbers. For example, when <A HREF="IDIV.htm">IDIV</A> is used to divide-9 by 4, the result is -2 with a remainder of -1. If <A HREF="SAL.htm">SAR</A> is used to shift-9 right by two bits, the result is -3. The "remainder" of this kind ofdivision is +3; however, the <A HREF="SAL.htm">SAR</A> instruction stores only the high-order bitof the remainder (in CF).<P>The code sequence in <A HREF="#fig3-9">Figure 3-9</A> produces the same result as <A HREF="IDIV.htm">IDIV</A> for any M = 2^(N), where 0 < N < 32. This sequence takes about 12 to 18 clocks,depending on whether the jump is taken; if ECX contains M, the corresponding<A HREF="IDIV.htm">IDIV</A> ECX instruction will take about 43 clocks.<P><A NAME="fig3-6"><IMG align=center SRC="fig3-6.gif" border=0><P><HR><P><A NAME="fig3-7"><IMG align=center SRC="fig3-7.gif" border=0><P><HR><P><A NAME="fig3-8"><IMG align=center SRC="fig3-8.gif" border=0><P><HR><P><A NAME="fig3-9"><IMG align=center SRC="fig3-9.gif" border=0><P><H3>3.4.4.2 Double-Shift Instructions</H3>These instructions provide the basic operations needed to implementoperations on long unaligned bit strings. The double shifts operate eitheron word or doubleword operands, as follows:<OL><LI>Taking two word operands as input and producing a one-word output.<LI>Taking two doubleword operands as input and producing a doublewordoutput.</OL>Of the two input operands, one may either be in a general register or inmemory, while the other may only be in a general register. The resultsreplace the memory or register operand. The number of bits to be shifted isspecified either in the CL register or in an immediate byte of theinstruction.<P>Bits are shifted from the register operand into the memory or registeroperand. CF is set to the value of the last bit shifted out of thedestination operand. SF, ZF, and PF are set according to the value of theresult. OF and AF are left undefined.<P><A HREF="SHLD.htm">SHLD</A> (Shift Left Double) shifts bits of the R/M field to the left, whileshifting high-order bits from the Reg field into the R/M field on the right(see <A HREF="#fig3-10">Figure 3-10</A>). The result is stored back into the R/M operand. The Regfield is not modified.<P><A HREF="SHRD.htm">SHRD</A> (Shift Right Double) shifts bits of the R/M field to the right, whileshifting low-order bits from the Reg field into the R/M field on the left(see <A HREF="#fig3-11">Figure 3-11</A>). The result is stored back into the R/M operand. The Regfield is not modified.<H3>3.4.4.3 Rotate Instructions</H3>Rotate instructions allow bits in bytes, words, and doublewords to berotated. Bits rotated out of an operand are not lost as in a shift, but are"circled" back into the other "end" of the operand.<P>Rotates affect only the carry and overflow flags. CF may act as anextension of the operand in two of the rotate instructions, allowing a bitto be isolated and then tested by a conditional jump instruction (<A HREF="Jcc.htm">JC</A> or<A HREF="Jcc.htm">JNC</A>). CF always contains the value of the last bit rotated out, even if theinstruction does not use this bit as an extension of the rotated operand.<P>In single-bit rotates, OF is set if the operation changes the high-order(sign) bit of the destination operand. If the sign bit retains its originalvalue, OF is cleared. On multibit rotates, the value of OF is alwaysundefined.<P><A HREF="RCL.htm">ROL</A> (Rotate Left) rotates the byte, word, or doubleword destination operandleft by one or by the number of bits specified in the count operand (animmediate value or the value contained in CL). For each rotation specified,the high-order bit that exits from the left of the operand returns at theright to become the new low-order bit of the operand. See <A HREF="#fig3-12">Figure 3-12</A>.<P><A HREF="RCL.htm">ROR</A> (Rotate Right) rotates the byte, word, or doubleword destinationoperand right by one or by the number of bits specified in the count operand(an immediate value or the value contained in CL). For each rotationspecified, the low-order bit that exits from the right of the operandreturns at the left to become the new high-order bit of the operand.See <A HREF="#fig3-13">Figure 3-13</A>.<P><A HREF="RCL.htm">RCL</A> (Rotate Through Carry Left) rotates bits in the byte, word, ordoubleword destination operand left by one or by the number of bitsspecified in the count operand (an immediate value or the value contained inCL).<P>This instruction differs from <A HREF="RCL.htm">ROL</A> in that it treats CF as a high-orderone-bit extension of the destination operand. Each high-order bit that exits?? 快捷鍵說明
復(fù)制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -