IMPORT	Main
AREA	Init,CODE,READONLY
ENTRY
LDR		R0,=0x3FF0000
LDR		R1,=0xE7FFFF80	;配置SYSCFG，片內4K  Cache,4K  SRAM
STR		R1,[R0]
LDR		SP,=0x3FE1000	;SP指向4K  SRAM的尾指針，堆棧向下生成
BL		Main
B		.
END