?? lpc11xx.h
字號(hào):
/******************** (C) COPYRIGHT 2010 Embest Info&Tech Co.,LTD. ************
* 文件名: LPC11xx.h
* 作者 : Wuhan R&D Center, Embest
* 日期 : 01/18/2010
* 描述 : CMSIS Cortex-M0核外圍訪問(wèn)層頭文件，用于NXP LPC11xx系列設(shè)備
*******************************************************************************
*******************************************************************************
* 歷史:
* 01/18/2010 : V1.0 初始版本
*******************************************************************************/
#ifndef __LPC11xx_H__
#define __LPC11xx_H__
/*
* ============================================================================
* ---------- 中斷號(hào)定義 ------------------------------------------------------
* ============================================================================
*/
typedef enum IRQn
{
/****** Cortex-M3處理器異常號(hào) ************************************************/
NonMaskableInt_IRQn = -14, /*!< 2 不可屏蔽中斷 */
MemoryManagement_IRQn = -12, /*!< 4 Cortex-M0存儲(chǔ)器管理故障中斷*/
BusFault_IRQn = -11, /*!< 5 Cortex-M0總線故障中斷 */
UsageFault_IRQn = -10, /*!< 6 Cortex-M0用法故障中斷 */
SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call中斷 */
DebugMonitor_IRQn = -4, /*!< 12 Cortex-M0 DebugMonitor中斷*/
PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV中斷 */
SysTick_IRQn = -1, /*!< 15 Cortex-M0 SystemTick中斷 */
/****** LPC11xx 外部中斷號(hào) ***************************************************/
WAKEUP0_IRQn = 0, /*!< 所有的I/O引腳都可用做喚醒源 */
WAKEUP1_IRQn = 1,
WAKEUP2_IRQn = 2,
WAKEUP3_IRQn = 3,
WAKEUP4_IRQn = 4,
WAKEUP5_IRQn = 5,
WAKEUP6_IRQn = 6,
WAKEUP7_IRQn = 7,
WAKEUP8_IRQn = 8,
WAKEUP9_IRQn = 9,
WAKEUP10_IRQn = 10,
WAKEUP11_IRQn = 11,
WAKEUP12_IRQn = 12,
CAN_IRQn = 13, /*!< CAN 中斷 */
SSP1_IRQn = 14, /*!< SSP1 中斷 */
I2C_IRQn = 15, /*!< I2C 中斷 */
TIMER_16_0_IRQn = 16, /*!< 16-bit Timer0 中斷 */
TIMER_16_1_IRQn = 17, /*!< 16-bit Timer1 中斷 */
TIMER_32_0_IRQn = 18, /*!< 32-bit Timer0 中斷 */
TIMER_32_1_IRQn = 19, /*!< 32-bit Timer1 中斷 */
SSP0_IRQn = 20, /*!< SSP0 中斷 */
UART_IRQn = 21, /*!< UART 中斷 */
USB_IRQn = 22, /*!< USB常規(guī)中斷 */
USB_FIQn = 23, /*!< USB快速中斷 */
ADC_IRQn = 24, /*!< A/D 轉(zhuǎn)換中斷 */
WDT_IRQn = 25, /*!< Watchdog定時(shí)器中斷 */
BOD_IRQn = 26, /*!< Brown Out Detect(BOD)中斷 */
RESERVED_IRQn = 27, /*!< 保留 */
EINT3_IRQn = 28, /*!< 外部PIO3中斷 */
EINT2_IRQn = 29, /*!< 外部PIO2中斷 */
EINT1_IRQn = 30, /*!< 外部PIO1中斷 */
EINT0_IRQn = 31, /*!< 外部PIO0中斷 */
} IRQn_Type;
/*
* ============================================================================
* ----------- 處理器和內(nèi)核外圍部分 -------------------------------------------
* ============================================================================
*/
/* Cortex-M0處理器和內(nèi)核外圍配置 */
#define __MPU_PRESENT 1 /*!< MPU有或無(wú) */
#define __NVIC_PRIO_BITS 5 /*!< 優(yōu)先級(jí)位數(shù)定義 */
#define __Vendor_SysTickConfig 0 /*!< 使能不同的滴答配置，此位置位 */
#include "core_cm0.h" /* Cortex-M0處理器和內(nèi)核外圍 */
#include "system_LPC11xx.h"
extern void SystemInit (void);
/******************************************************************************/
/* 外圍設(shè)備寄存器 */
/******************************************************************************/
#pragma anon_unions
/*------------- 系統(tǒng)控制 (SYSCON) --------------------------------------------*/
typedef struct
{
__IO uint32_t SYSMEMREMAP; /* 系統(tǒng)存儲(chǔ)器重映射，偏移0x0 */
__IO uint32_t PRESETCTRL;
__IO uint32_t SYSPLLCTRL; /* 系統(tǒng)PLL控制 */
__IO uint32_t SYSPLLSTAT;
__IO uint32_t USBPLLCTRL; /* USB PLL控制，偏移0x10 */
__IO uint32_t USBPLLSTAT;
uint32_t RESERVED0[2];
__IO uint32_t SYSOSCCTRL; /* 偏移 0x20 */
__IO uint32_t WDTOSCCTRL;
__IO uint32_t IRCCTRL;
uint32_t RESERVED1[1];
__IO uint32_t SYSRESSTAT; /* 偏移 0x30 */
uint32_t RESERVED2[3];
__IO uint32_t SYSPLLCLKSEL; /* 偏移 0x40 */
__IO uint32_t SYSPLLCLKUEN;
__IO uint32_t USBPLLCLKSEL;
__IO uint32_t USBPLLCLKUEN;
uint32_t RESERVED3[8];
__IO uint32_t MAINCLKSEL; /* 偏移 0x70 */
__IO uint32_t MAINCLKUEN;
__IO uint32_t SYSAHBCLKDIV;
uint32_t RESERVED4[1];
__IO uint32_t SYSAHBCLKCTRL; /* 偏移 0x80 */
uint32_t RESERVED5[4];
__IO uint32_t SSP0CLKDIV;
__IO uint32_t UARTCLKDIV;
__IO uint32_t SSP1CLKDIV;
uint32_t RESERVED6[3];
__IO uint32_t TRACECLKDIV;
__IO uint32_t SYSTICKCLKDIV; /* 偏移 0xB0 */
uint32_t RESERVED7[3];
__IO uint32_t USBCLKSEL; /* 偏移 0xC0 */
__IO uint32_t USBCLKUEN;
__IO uint32_t USBCLKDIV;
uint32_t RESERVED8[1];
__IO uint32_t WDTCLKSEL; /* 偏移 0xD0 */
__IO uint32_t WDTCLKUEN;
__IO uint32_t WDTCLKDIV;
uint32_t RESERVED9[1];
__IO uint32_t CLKOUTCLKSEL; /* 偏移 0xE0 */
__IO uint32_t CLKOUTUEN;
__IO uint32_t CLKOUTDIV;
uint32_t RESERVED10[5];
__IO uint32_t PIOPORCAP0; /* 偏移 0x100 */
__IO uint32_t PIOPORCAP1;
uint32_t RESERVED11[18];
__IO uint32_t BODCTRL; /* 偏移 0x150 */
uint32_t RESERVED12[1];
__IO uint32_t SYSTCKCAL;
uint32_t RESERVED13[5];
__IO uint32_t INT_IRQ_LATENCY; /* 偏移 0x170 */
uint32_t RESERVED14[35];
__IO uint32_t STARTAPRP0; /* 偏移 0x200 */
__IO uint32_t STARTERP0;
__IO uint32_t STARTRSRP0CLR;
__IO uint32_t STARTSRP0;
__IO uint32_t STARTAPRP1;
__IO uint32_t STARTERP1;
__IO uint32_t STARTRSRP1CLR;
__IO uint32_t STARTSRP1;
uint32_t RESERVED15[4];
__IO uint32_t PDSLEEPCFG; /* 偏移 0x230 */
__IO uint32_t PDAWAKECFG;
__IO uint32_t PDRUNCFG;
uint32_t RESERVED16[110];
__I uint32_t DEVICE_ID;
} SYSCON_TypeDef;
/*------------- 引腳連接 (IOCON) ---------------------------------------------*/
typedef struct
{
__IO uint32_t PIO2_6;
uint32_t RESERVED0[1];
__IO uint32_t PIO2_0;
__IO uint32_t RESET_PIO0_0;
__IO uint32_t PIO0_1;
__IO uint32_t PIO1_8;
uint32_t RESERVED1[1];
__IO uint32_t PIO0_2;
__IO uint32_t PIO2_7;
__IO uint32_t PIO2_8;
__IO uint32_t PIO2_1;
__IO uint32_t PIO0_3;
__IO uint32_t PIO0_4;
__IO uint32_t PIO0_5;
__IO uint32_t PIO1_9;
__IO uint32_t PIO3_4;
__IO uint32_t PIO2_4;
__IO uint32_t PIO2_5;
__IO uint32_t PIO3_5;
__IO uint32_t PIO0_6;
__IO uint32_t PIO0_7;
__IO uint32_t PIO2_9;
__IO uint32_t PIO2_10;
__IO uint32_t PIO2_2;
__IO uint32_t PIO0_8;
__IO uint32_t PIO0_9;
__IO uint32_t JTAG_TCK_PIO0_10;
__IO uint32_t PIO1_10;
__IO uint32_t PIO2_11;
__IO uint32_t JTAG_TDI_PIO0_11;
__IO uint32_t JTAG_TMS_PIO1_0;
__IO uint32_t JTAG_TDO_PIO1_1;
__IO uint32_t JTAG_nTRST_PIO1_2;
__IO uint32_t PIO3_0;
__IO uint32_t PIO3_1;
__IO uint32_t PIO2_3;
__IO uint32_t ARM_SWDIO_PIO1_3;
__IO uint32_t PIO1_4;
__IO uint32_t PIO1_11;
__IO uint32_t PIO3_2;
__IO uint32_t PIO1_5;
__IO uint32_t PIO1_6;
__IO uint32_t PIO1_7;
__IO uint32_t PIO3_3;
__IO uint32_t SCKLOC;
__IO uint32_t DSRLOC;
__IO uint32_t DCDLOC;
__IO uint32_t RILOC;
} IOCON_TypeDef;
/*------------- 電源管理單元 (PMU) -------------------------------------------*/
typedef struct
{
__IO uint32_t PCON;
__IO uint32_t GPREG0;
__IO uint32_t GPREG1;
__IO uint32_t GPREG2;
__IO uint32_t GPREG3;
__IO uint32_t GPREG4;
} PMU_TypeDef;
/*------------- 通用IO (GPIO) ------------------------------------------------*/
typedef struct
{
union {
__IO uint32_t MASKED_ACCESS[4096];
struct {
uint32_t RESERVED0[4095];
__IO uint32_t DATA;
};
};
uint32_t RESERVED1[4096];
__IO uint32_t DIR;
__IO uint32_t IS;
__IO uint32_t IBE;
__IO uint32_t IEV;
__IO uint32_t IE;
__IO uint32_t RIS;
__IO uint32_t MIS;
__IO uint32_t IC;
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