?? startup_lpc11xx.lst
字號:
ARM Macro Assembler Page 1
1 00000000 ;/******************************************************
********************//**
2 00000000 ; * @file startup_LPC11xx.s
3 00000000 ; * @brief CMSIS Cortex-M0 Core Device Startup File
4 00000000 ; * for the NXP LPC11xx Device Series
5 00000000 ; * @version V1.00
6 00000000 ; * @date 17. November 2009
7 00000000 ; *------- <<< Use Configuration Wizard in Context Menu
>>> ------------------
8 00000000 ; *
9 00000000 ; * @note
10 00000000 ; * Copyright (C) 2009 ARM Limited. All rights reserved.
11 00000000 ; *
12 00000000 ; * @par
13 00000000 ; * ARM Limited (ARM) is supplying this software for use
with Cortex-M
14 00000000 ; * processor based microcontrollers. This file can be
freely distributed
15 00000000 ; * within development tools that are supporting such AR
M based processors.
16 00000000 ; *
17 00000000 ; * @par
18 00000000 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, W
HETHER EXPRESS, IMPLIED
19 00000000 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED
WARRANTIES OF
20 00000000 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
APPLY TO THIS SOFTWARE.
21 00000000 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR S
PECIAL, INCIDENTAL, OR
22 00000000 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 00000000 ; *
24 00000000 ; ******************************************************
************************/
25 00000000
26 00000000
27 00000000 ; <h> Stack Configuration
28 00000000 ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
29 00000000 ; </h>
30 00000000
31 00000000 00000200
Stack_Size
EQU 0x00000200
32 00000000
33 00000000 AREA STACK, NOINIT, READWRITE, ALIGN
=3
34 00000000 Stack_Mem
SPACE Stack_Size
35 00000200 __initial_sp
36 00000200
37 00000200
38 00000200 ; <h> Heap Configuration
39 00000200 ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
40 00000200 ; </h>
41 00000200
42 00000200 00000000
Heap_Size
EQU 0x00000000
ARM Macro Assembler Page 2
43 00000200
44 00000200 AREA HEAP, NOINIT, READWRITE, ALIGN=
3
45 00000000 __heap_base
46 00000000 Heap_Mem
SPACE Heap_Size
47 00000000 __heap_limit
48 00000000
49 00000000
50 00000000 PRESERVE8
51 00000000 THUMB
52 00000000
53 00000000
54 00000000 ; Vector Table Mapped to Address 0 at Reset
55 00000000
56 00000000 AREA RESET, DATA, READONLY
57 00000000 EXPORT __Vectors
58 00000000
59 00000000 00000000
__Vectors
DCD __initial_sp ; Top of Stack
60 00000004 00000000 DCD Reset_Handler ; Reset Handler
61 00000008 00000000 DCD NMI_Handler ; NMI Handler
62 0000000C 00000000 DCD HardFault_Handler ; Hard Fault
Handler
63 00000010 00000000 DCD 0 ; Reserved
64 00000014 00000000 DCD 0 ; Reserved
65 00000018 00000000 DCD 0 ; Reserved
66 0000001C 00000000 DCD 0 ; Reserved
67 00000020 00000000 DCD 0 ; Reserved
68 00000024 00000000 DCD 0 ; Reserved
69 00000028 00000000 DCD 0 ; Reserved
70 0000002C 00000000 DCD SVC_Handler ; SVCall Handler
71 00000030 00000000 DCD 0 ; Reserved
72 00000034 00000000 DCD 0 ; Reserved
73 00000038 00000000 DCD PendSV_Handler ; PendSV Handler
74 0000003C 00000000 DCD SysTick_Handler
; SysTick Handler
75 00000040
76 00000040 ; External Interrupts
77 00000040 00000000 DCD WAKEUP_IRQHandler ; 16+ 0: Wake
up PIO0.0
78 00000044 00000000 DCD WAKEUP_IRQHandler ; 16+ 1: Wake
up PIO0.1
79 00000048 00000000 DCD WAKEUP_IRQHandler ; 16+ 2: Wake
up PIO0.2
80 0000004C 00000000 DCD WAKEUP_IRQHandler ; 16+ 3: Wake
up PIO0.3
81 00000050 00000000 DCD WAKEUP_IRQHandler ; 16+ 4: Wake
up PIO0.4
82 00000054 00000000 DCD WAKEUP_IRQHandler ; 16+ 5: Wake
up PIO0.5
83 00000058 00000000 DCD WAKEUP_IRQHandler ; 16+ 6: Wake
up PIO0.6
84 0000005C 00000000 DCD WAKEUP_IRQHandler ; 16+ 7: Wake
up PIO0.7
85 00000060 00000000 DCD WAKEUP_IRQHandler ; 16+ 8: Wake
up PIO0.8
ARM Macro Assembler Page 3
86 00000064 00000000 DCD WAKEUP_IRQHandler ; 16+ 9: Wake
up PIO0.9
87 00000068 00000000 DCD WAKEUP_IRQHandler ; 16+10: Wake
up PIO0.10
88 0000006C 00000000 DCD WAKEUP_IRQHandler ; 16+11: Wake
up PIO0.11
89 00000070 00000000 DCD WAKEUP_IRQHandler ; 16+12: Wake
up PIO1.0
90 00000074 00000000 DCD 0 ; 16+13: Reserved
91 00000078 00000000 DCD SSP1_IRQHandler ; 16+14: SSP1
92 0000007C 00000000 DCD I2C_IRQHandler ; 16+15: I2C
93 00000080 00000000 DCD TIMER16_0_IRQHandler ; 16+16: 1
6-bit Counter-Timer
0
94 00000084 00000000 DCD TIMER16_1_IRQHandler ; 16+17: 1
6-bit Counter-Timer
1
95 00000088 00000000 DCD TIMER32_0_IRQHandler ; 16+18: 3
2-bit Counter-Timer
0
96 0000008C 00000000 DCD TIMER32_1_IRQHandler ; 16+19: 3
2-bit Counter-Timer
1
97 00000090 00000000 DCD SSP0_IRQHandler ; 16+20: SSP0
98 00000094 00000000 DCD UART_IRQHandler ; 16+21: UART
99 00000098 00000000 DCD 0 ; 16+22: Reserved
100 0000009C 00000000 DCD 0 ; 16+24: Reserved
101 000000A0 00000000 DCD ADC_IRQHandler ; 16+24: A/D Con
verter
102 000000A4 00000000 DCD WDT_IRQHandler ; 16+25: Watchdo
g Timer
103 000000A8 00000000 DCD BOD_IRQHandler ; 16+26: Brown O
ut Detect
104 000000AC 00000000 DCD 0 ; 16+27: Reserved
105 000000B0 00000000 DCD PIOINT3_IRQHandler
; 16+28: PIO INT3
106 000000B4 00000000 DCD PIOINT2_IRQHandler
; 16+29: PIO INT2
107 000000B8 00000000 DCD PIOINT1_IRQHandler
; 16+30: PIO INT1
108 000000BC 00000000 DCD PIOINT0_IRQHandler
; 16+31: PIO INT0
109 000000C0
110 000000C0
111 000000C0 IF :LNOT::DEF:NO_CRP
112 000000C0 AREA |.ARM.__at_0x02FC|, CODE, READO
NLY
113 00000000 FFFFFFFF
CRP_Key DCD 0xFFFFFFFF
114 00000004 ENDIF
115 00000004
116 00000004
117 00000004 AREA |.text|, CODE, READONLY
118 00000000
119 00000000
120 00000000 ; Reset Handler
121 00000000
122 00000000 Reset_Handler
PROC
ARM Macro Assembler Page 4
123 00000000 EXPORT Reset_Handler [WEAK
]
124 00000000 IMPORT __main
125 00000000 4806 LDR R0, =__main
126 00000002 4700 BX R0
127 00000004 ENDP
128 00000004
129 00000004
130 00000004 ; Dummy Exception Handlers (infinite loops which can be
modified)
131 00000004
132 00000004 NMI_Handler
PROC
133 00000004 EXPORT NMI_Handler [WEAK
]
134 00000004 E7FE B .
135 00000006 ENDP
137 00000006 HardFault_Handler
PROC
138 00000006 EXPORT HardFault_Handler [WEAK
]
139 00000006 E7FE B .
140 00000008 ENDP
141 00000008 SVC_Handler
PROC
142 00000008 EXPORT SVC_Handler [WEAK
]
143 00000008 E7FE B .
144 0000000A ENDP
145 0000000A PendSV_Handler
PROC
146 0000000A EXPORT PendSV_Handler [WEAK
]
147 0000000A E7FE B .
148 0000000C ENDP
149 0000000C SysTick_Handler
PROC
150 0000000C EXPORT SysTick_Handler [WEAK
]
151 0000000C E7FE B .
152 0000000E ENDP
153 0000000E
154 0000000E Default_Handler
PROC
155 0000000E
156 0000000E EXPORT WAKEUP_IRQHandler [WEAK
]
157 0000000E EXPORT SSP1_IRQHandler [WEAK
]
158 0000000E EXPORT I2C_IRQHandler [WEAK
]
159 0000000E EXPORT TIMER16_0_IRQHandler [WEAK
]
160 0000000E EXPORT TIMER16_1_IRQHandler [WEAK
]
161 0000000E EXPORT TIMER32_0_IRQHandler [WEAK
]
162 0000000E EXPORT TIMER32_1_IRQHandler [WEAK
]
ARM Macro Assembler Page 5
163 0000000E EXPORT SSP0_IRQHandler [WEAK
]
164 0000000E EXPORT UART_IRQHandler [WEAK
]
165 0000000E EXPORT ADC_IRQHandler [WEAK
]
166 0000000E EXPORT WDT_IRQHandler [WEAK
]
167 0000000E EXPORT BOD_IRQHandler [WEAK
]
168 0000000E EXPORT PIOINT3_IRQHandler [WEAK
]
169 0000000E EXPORT PIOINT2_IRQHandler [WEAK
]
170 0000000E EXPORT PIOINT1_IRQHandler [WEAK
]
171 0000000E EXPORT PIOINT0_IRQHandler [WEAK
]
172 0000000E
173 0000000E WAKEUP_IRQHandler
174 0000000E SSP1_IRQHandler
175 0000000E I2C_IRQHandler
176 0000000E TIMER16_0_IRQHandler
177 0000000E TIMER16_1_IRQHandler
178 0000000E TIMER32_0_IRQHandler
179 0000000E TIMER32_1_IRQHandler
180 0000000E SSP0_IRQHandler
181 0000000E UART_IRQHandler
182 0000000E ADC_IRQHandler
183 0000000E WDT_IRQHandler
184 0000000E BOD_IRQHandler
185 0000000E PIOINT3_IRQHandler
186 0000000E PIOINT2_IRQHandler
187 0000000E PIOINT1_IRQHandler
188 0000000E PIOINT0_IRQHandler
189 0000000E
190 0000000E E7FE B .
191 00000010
192 00000010 ENDP
193 00000010
194 00000010
195 00000010 ALIGN
196 00000010
197 00000010
198 00000010 ; User Initial Stack & Heap
199 00000010
200 00000010 IF :DEF:__MICROLIB
207 00000010
208 00000010 IMPORT __use_two_region_memory
209 00000010 EXPORT __user_initial_stackheap
210 00000010 __user_initial_stackheap
211 00000010
212 00000010 4803 LDR R0, = Heap_Mem
213 00000012 4904 LDR R1, =(Stack_Mem + Stack_Size)
214 00000014 4A02 LDR R2, = (Heap_Mem + Heap_Size)
215 00000016 4B04 LDR R3, = Stack_Mem
216 00000018 4770 BX LR
217 0000001A
218 0000001A 00 00 ALIGN
ARM Macro Assembler Page 6
219 0000001C
220 0000001C ENDIF
221 0000001C
222 0000001C
223 0000001C END
00000000
00000000
00000200
00000000
Command Line: --debug --xref --cpu=Cortex-M0 --apcs=interwork -ostartup_LPC11xx
.o -ID:\Keil\ARM\INC -ID:\Keil\ARM\INC\NXP\LPC11xx --list=startup_LPC11xx.lst s
tartup_LPC11xx.s
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
STACK 00000000
Symbol: STACK
Definitions
At line 33 in file startup_LPC11xx.s
Uses
None
Comment: STACK unused
Stack_Mem 00000000
Symbol: Stack_Mem
Definitions
At line 34 in file startup_LPC11xx.s
Uses
At line 213 in file startup_LPC11xx.s
At line 215 in file startup_LPC11xx.s
__initial_sp 00000200
Symbol: __initial_sp
Definitions
At line 35 in file startup_LPC11xx.s
Uses
At line 59 in file startup_LPC11xx.s
Comment: __initial_sp used once
3 symbols
ARM Macro Assembler Page 1 Alphabetic symbol ordering
Relocatable symbols
HEAP 00000000
Symbol: HEAP
Definitions
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