Archelon msp430 Assembler     Version 1.58 2004/03/12      File C:\AQ430 Practice Code\prac1_IO\prac1.asm      Page 1

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     00            108 sfrb    IE1               = (0x0000);
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     02            118 sfrb    IFG1              = (0x0002);
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     04            127 sfrb    ME1               = (0x0004);
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     01            134 sfrb    IE2               = (0x0001);
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     03            141 sfrb    IFG2              = (0x0003);
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     05            148 sfrb    ME2               = (0x0005);
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     120            159 sfrw    WDTCTL            = (0x0120);
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     130            205 sfrw    MPY               = (0x0130);
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     132            207 sfrw    MPYS              = (0x0132);
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     134            209 sfrw    MAC               = (0x0134);
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     136            211 sfrw    MACS              = (0x0136);
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     138            213 sfrw    OP2               = (0x0138);
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     13a            215 sfrw    RESLO             = (0x013A);
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     13c            217 sfrw    RESHI             = (0x013C);
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     13e            219 const sfrw SUMEXT         = (0x013E);
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     20            226 const sfrb P1IN           = (0x0020);
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     21            228 sfrb    P1OUT             = (0x0021);
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     22            230 sfrb    P1DIR             = (0x0022);
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     23            232 sfrb    P1IFG             = (0x0023);
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     24            234 sfrb    P1IES             = (0x0024);
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     25            236 sfrb    P1IE              = (0x0025);
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     26            238 sfrb    P1SEL             = (0x0026);
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     28            241 const sfrb P2IN           = (0x0028);
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     29            243 sfrb    P2OUT             = (0x0029);
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     2a            245 sfrb    P2DIR             = (0x002A);
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     2b            247 sfrb    P2IFG             = (0x002B);
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     2c            249 sfrb    P2IES             = (0x002C);
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     2d            251 sfrb    P2IE              = (0x002D);
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     2e            253 sfrb    P2SEL             = (0x002E);
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     18            260 const sfrb P3IN           = (0x0018);
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     19            262 sfrb    P3OUT             = (0x0019);
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     1a            264 sfrb    P3DIR             = (0x001A);
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     1b            266 sfrb    P3SEL             = (0x001B);
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     1c            269 const sfrb P4IN           = (0x001C);
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     1d            271 sfrb    P4OUT             = (0x001D);
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     1e            273 sfrb    P4DIR             = (0x001E);
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     1f            275 sfrb    P4SEL             = (0x001F);
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     30            282 const sfrb P5IN           = (0x0030);
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     31            284 sfrb    P5OUT             = (0x0031);
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     32            286 sfrb    P5DIR             = (0x0032);
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     33            288 sfrb    P5SEL             = (0x0033);
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     34            291 const sfrb P6IN           = (0x0034);
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     35            293 sfrb    P6OUT             = (0x0035);
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     36            295 sfrb    P6DIR             = (0x0036);
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     37            297 sfrb    P6SEL             = (0x0037);
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     40            304 sfrb    BTCTL             = (0x0040);
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     46            316 sfrb    BTCNT1            = (0x0046);
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     47            318 sfrb    BTCNT2            = (0x0047);
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     50            397 sfrb    SCFI0             = (0x0050);
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     51            411 sfrb    SCFI1             = (0x0051);
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     52            413 sfrb    SCFQCTL           = (0x0052);
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     53            426 sfrb    FLL_CTL0          = (0x0053);
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     54            446 sfrb    FLL_CTL1          = (0x0054);
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