instr: 11
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x539f539f UCRF_WR:17 STAGES:-1,
    U2: OP: AND LINE:110 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:110
    U4: OP: UMULRND16 LINE:72 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:72
    B:16 = RF:5:OUT:0:REG:1 VAR: tmp#33 DATATYPE: INT,
    U2:IN:0 = B:16 VAR: tmp#33 DATATYPE: INT,
    B:17 = RF:9:OUT:0:REG:3 VAR: const#7 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: const#7 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|idx3#||0 VAR: idx3 DATATYPE: INT,
    RF:3:IN:0:REG:2 = B:31 STAGE:-1 VAR: idx3 DATATYPE: INT,
    RF:16:IN:0:REG:3 = B:31 STAGE:-1 VAR: idx3 DATATYPE: INT,
    RF:17:IN:0:REG:3 = B:31 STAGE:-1 VAR: idx3 DATATYPE: INT,
    B:23 = IN:1 STAGE:-1 LINE:75 VAR: utmp DATATYPE: UHALF2,
    RF:11:IN:0:REG:2 = B:23 STAGE:-1 VAR: utmp DATATYPE: UHALF2,
    B:21 = RF:13:OUT:0:REG:5 VAR: quant_scale DATATYPE: UHALF2,
    U4:IN:1 = B:21 VAR: quant_scale DATATYPE: UHALF2,
    B:20 = RF:11:OUT:0:REG:2 VAR: utmp DATATYPE: UHALF2,
    U4:IN:0 = B:20 VAR: utmp DATATYPE: UHALF2,
    //  IN:ADDER_2: ( idx3 ) = AND( tmp#33 == UNITRF_0_4[1], const#7 == UNITRF_1_3[3] )
    // OUT:ADDER_2: AND => ( idx3 == UNITRF_0_2[2], idx3 == SPIDXRF_0[3], idx3 == SPIDXRF_1[3] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x539f539f == UCRF_0[17] )
    // OUT:INOUT_1: DATA_IN => ( utmp == MULRF_0_1[2] )
    //  IN:MULTIPLIER_1: ( tmp#9, tmp#10 ) = UMULRND16( quant_scale == MULRF_1_1[5], utmp == MULRF_0_1[2] )
    DEAD_REGS: {  };
instr: 12
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x187e187e UCRF_WR:16 STAGES:-1,
    U0: OP: ISUB32 LINE:111 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:111
    U4: OP: UMULRND16 LINE:76 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:76
    U7: OP: SELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:12 = RF:3:OUT:0:REG:2 VAR: idx3 DATATYPE: INT,
    U0:IN:0 = B:12 VAR: idx3 DATATYPE: INT,
    B:13 = RF:7:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: hw_const#1 DATATYPE: ANYINT,
    B:21 = RF:13:OUT:0:REG:5 VAR: quant_scale DATATYPE: UHALF2,
    U4:IN:1 = B:21 VAR: quant_scale DATATYPE: UHALF2,
    B:20 = RF:11:OUT:0:REG:2 VAR: utmp DATATYPE: UHALF2,
    U4:IN:0 = B:20 VAR: utmp DATATYPE: UHALF2,
    B:38 = RF:18:OUT:1:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:2 = B:38 VAR: hw_const#0 DATATYPE: ANYINT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|const#8#||0 VAR: const#8 DATATYPE: ANYINT,
    RF:5:IN:0:REG:1 = B:27 STAGE:-1 VAR: const#8 DATATYPE: ANYINT,
    //  IN:ADDER_0: ( tmp#34 ) = ISUB32( idx3 == UNITRF_0_2[2], hw_const#1 == UNITRF_1_1[0] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x187e187e == UCRF_0[16] )
    //  IN:MULTIPLIER_1: ( tmp#15, tmp#16 ) = UMULRND16( quant_scale == MULRF_1_1[5], utmp == MULRF_0_1[2] )
    //  IN:COMM_SCHED_0: ( const#8 ) = SELECT( hw_const#0 == CCRF_0[0], hw_const#8 == PERMRF_0[0] )
    // OUT:COMM_SCHED_0: SELECT => ( const#8 == UNITRF_0_4[1] )
    DEAD_REGS: {  };
instr: 13
    MC: OP: UC_DATA_IN LINE:-1 IMM:0x2d412d41 UCRF_WR:10 STAGES:-1,
    U4: OP: UMULRND16 LINE:68 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:68
    U2: OP: SHIFT32 LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U1: OP: NOT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:29 = U0:OUT:0 INSTR_LOG:2|tmp#34#||0 VAR: tmp#34 DATATYPE: INT,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: tmp#34 DATATYPE: INT,
    B:20 = RF:11:OUT:0:REG:1 VAR: quant_scale DATATYPE: UHALF2,
    U4:IN:0 = B:20 VAR: quant_scale DATATYPE: UHALF2,
    B:21 = RF:13:OUT:0:REG:1 VAR: utmp DATATYPE: UHALF2,
    U4:IN:1 = B:21 VAR: utmp DATATYPE: UHALF2,
    B:16 = RF:5:OUT:0:REG:1 VAR: const#8 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: const#8 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:31 = U2:OUT:0 INSTR_LOG:1|const#16#||0 VAR: const#16 DATATYPE: ANYINT,
    RF:7:IN:0:REG:3 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
    RF:5:IN:0:REG:1 = B:31 STAGE:-1 VAR: const#16 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U1:IN:0 = B:14 VAR: hw_const#0 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|const#-1#||0 VAR: const#-1 DATATYPE: ANYINT,
    RF:8:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#-1 DATATYPE: ANYINT,
    RF:9:IN:0:REG:4 = B:30 STAGE:-1 VAR: const#-1 DATATYPE: ANYINT,
    RF:6:IN:0:REG:1 = B:30 STAGE:-1 VAR: const#-1 DATATYPE: ANYINT,
    // OUT:ADDER_0: ISUB32 => ( tmp#34 == UNITRF_0_3[1] )
    // OUT:MC_0: UC_DATA_IN => ( uc_const#0x2d412d41 == UCRF_0[10] )
    //  IN:MULTIPLIER_1: ( tmp#3, tmp#4 ) = UMULRND16( quant_scale == MULRF_0_1[1], utmp == MULRF_1_1[1] )
    //  IN:ADDER_2: ( const#16 ) = SHIFT32( const#8 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
    // OUT:ADDER_2: SHIFT32 => ( const#16 == UNITRF_1_1[3], const#16 == UNITRF_0_4[1] )
    //  IN:ADDER_1: ( const#-1 ) = NOT( hw_const#0 == UNITRF_0_3[0] )
    // OUT:ADDER_1: NOT => ( const#-1 == UNITRF_1_2[4], const#-1 == UNITRF_1_3[4], const#-1 == UNITRF_1_0[1] )
    DEAD_REGS: {  };
instr: 14
    MC: OP: CHK_EOS LINE:116 UCRF_RD:15 STR_ID:0,
    U1: OP: AND LINE:111 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:111
    U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U2: OP: ISUB32 LINE:103 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:103
    U0: OP: SHIFT32 LINE:102 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:102
    U3: OP: UMULRND16 LINE:70 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:70
    U5: OP: NSELECT LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    B:14 = RF:4:OUT:0:REG:1 VAR: tmp#34 DATATYPE: INT,
    U1:IN:0 = B:14 VAR: tmp#34 DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:3 VAR: const#7 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: const#7 DATATYPE: ANYINT,
    B:30 = U1:OUT:0 INSTR_LOG:1|idx4#||0 VAR: idx4 DATATYPE: INT,
    RF:5:IN:0:REG:1 = B:30 STAGE:-1 VAR: idx4 DATATYPE: INT,
    RF:16:IN:0:REG:4 = B:30 STAGE:-1 VAR: idx4 DATATYPE: INT,
    RF:17:IN:0:REG:4 = B:30 STAGE:-1 VAR: idx4 DATATYPE: INT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|K#7#||0 VAR: K#7 DATATYPE: HALF2,
    RF:12:IN:0:REG:1 = B:27 STAGE:-1 VAR: K#7 DATATYPE: HALF2,
    B:16 = RF:5:OUT:0:REG:1 VAR: const#16 DATATYPE: ANYINT,
    U2:IN:0 = B:16 VAR: const#16 DATATYPE: ANYINT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:35 = U4:OUT:1 INSTR_LOG:4|tmp#9#||1 VAR: tmp#9 DATATYPE: UHALF2,
    RF:3:IN:0:REG:1 = B:35 STAGE:-1 VAR: tmp#9 DATATYPE: UHALF2,
    B:12 = RF:3:OUT:0:REG:1 VAR: const#1 DATATYPE: ANYINT,
    U0:IN:0 = B:12 VAR: const#1 DATATYPE: ANYINT,
    B:13 = RF:7:OUT:0:REG:3 VAR: const#16 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#16 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|tmp#27#||0 VAR: tmp#27 DATATYPE: HALF2,
    RF:4:IN:0:REG:1 = B:29 STAGE:-1 VAR: tmp#27 DATATYPE: HALF2,
    B:19 = RF:12:OUT:0:REG:6 VAR: quant_scale DATATYPE: UHALF2,
    U3:IN:1 = B:19 VAR: quant_scale DATATYPE: UHALF2,
    B:18 = RF:10:OUT:0:REG:2 VAR: utmp DATATYPE: UHALF2,
    U3:IN:0 = B:18 VAR: utmp DATATYPE: UHALF2,
    B:39 = RF:18:OUT:2:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U5:IN:2 = B:39 VAR: hw_const#0 DATATYPE: ANYINT,
    B:10 = RF:6:OUT:0:REG:1 VAR: const#-1 DATATYPE: ANYINT,
    U5:IN:0 = B:10 VAR: const#-1 DATATYPE: ANYINT,
    B:28 = U5:OUT:0 INSTR_LOG:1|const#-1#||0 VAR: const#-1 DATATYPE: ANYINT,
    RF:7:IN:0:REG:3 = B:28 STAGE:-1 VAR: const#-1 DATATYPE: ANYINT,
    //  IN:ADDER_1: ( idx4 ) = AND( tmp#34 == UNITRF_0_3[1], const#7 == UNITRF_1_2[3] )
    // OUT:ADDER_1: AND => ( idx4 == UNITRF_0_4[1], idx4 == SPIDXRF_0[4], idx4 == SPIDXRF_1[4] )
    //  IN:COMM_SCHED_0: ( K#7 ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0x52035203 == UCRF_0[15] )
    // OUT:COMM_SCHED_0: COMMUCDATA => ( K#7 == MULRF_1_0[1] )
    //  IN:ADDER_2: ( tmp#29 ) = ISUB32( const#16 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
    // OUT:MULTIPLIER_1: UMULRND16 => ( tmp#9 == UNITRF_0_2[1] )
    //  IN:ADDER_0: ( tmp#27 ) = SHIFT32( const#1 == UNITRF_0_2[1], const#16 == UNITRF_1_1[3] )
    // OUT:ADDER_0: SHIFT32 => ( tmp#27 == UNITRF_0_3[1] )
    //  IN:MULTIPLIER_0: ( tmp#6, tmp#7 ) = UMULRND16( quant_scale == MULRF_1_0[6], utmp == MULRF_0_0[2] )
    //  IN:DIVIDER_0: ( const#-1 ) = NSELECT( hw_const#0 == CCRF_0[0], const#-1 == UNITRF_1_0[1] )
    // OUT:DIVIDER_0: NSELECT => ( const#-1 == UNITRF_1_1[3] )
    DEAD_REGS: {  };
instr: 15
    MC: OP: NONE LINE:-1 UCRF_RD:14 UCONDRF_WR:1 STAGES:-1,
    U2: OP: ISUB32 LINE:112 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:112
    U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U0: OP: SHIFT16 LINE:72 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:72
    U1: OP: OR LINE:102 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:102
    B:16 = RF:5:OUT:0:REG:1 VAR: idx4 DATATYPE: INT,
    U2:IN:0 = B:16 VAR: idx4 DATATYPE: INT,
    B:17 = RF:9:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U2:IN:1 = B:17 VAR: hw_const#1 DATATYPE: ANYINT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|K#6#||0 VAR: K#6 DATATYPE: HALF2,
    RF:11:IN:0:REG:1 = B:27 STAGE:-1 VAR: K#6 DATATYPE: HALF2,
    B:12 = RF:3:OUT:0:REG:1 VAR: tmp#9 DATATYPE: UHALF2,
    U0:IN:0 = B:12 VAR: tmp#9 DATATYPE: UHALF2,
    B:13 = RF:7:OUT:0:REG:3 VAR: const#-1 DATATYPE: ANYINT,
    U0:IN:1 = B:13 VAR: const#-1 DATATYPE: ANYINT,
    B:29 = U0:OUT:0 INSTR_LOG:1|quant#2#||0 VAR: quant#2 DATATYPE: HALF2,
    RF:13:IN:0:REG:1 = B:29 STAGE:-1 VAR: quant#2 DATATYPE: HALF2,
    B:35 = U4:OUT:1 INSTR_LOG:4|tmp#15#||1 VAR: tmp#15 DATATYPE: UHALF2,
    RF:5:IN:0:REG:2 = B:35 STAGE:-1 VAR: tmp#15 DATATYPE: UHALF2,
    B:31 = U2:OUT:0 INSTR_LOG:2|tmp#29#||0 VAR: tmp#29 DATATYPE: INT,
    RF:7:IN:0:REG:4 = B:31 STAGE:-1 VAR: tmp#29 DATATYPE: INT,
    B:15 = RF:8:OUT:0:REG:0 VAR: hw_const#1 DATATYPE: ANYINT,
    U1:IN:1 = B:15 VAR: hw_const#1 DATATYPE: ANYINT,
    B:14 = RF:4:OUT:0:REG:1 VAR: tmp#27 DATATYPE: HALF2,
    U1:IN:0 = B:14 VAR: tmp#27 DATATYPE: HALF2,
    B:30 = U1:OUT:0 INSTR_LOG:1|tmp#30#||0 VAR: tmp#30 DATATYPE: UHALF2,
    RF:9:IN:0:REG:2 = B:30 STAGE:-1 VAR: tmp#30 DATATYPE: UHALF2,
    RF:10:IN:0:REG:3 = B:30 STAGE:-1 VAR: tmp#30 DATATYPE: UHALF2,
    RF:8:IN:0:REG:2 = B:30 STAGE:-1 VAR: tmp#30 DATATYPE: UHALF2,
    RF:3:IN:0:REG:1 = B:30 STAGE:-1 VAR: tmp#30 DATATYPE: UHALF2,
    //  IN:ADDER_2: ( tmp#35 ) = ISUB32( idx4 == UNITRF_0_4[1], hw_const#1 == UNITRF_1_3[0] )
    // OUT:MC_0: CHK_EOS => ( tmp#38 == UCONDRF_0[1] )
    //  IN:COMM_SCHED_0: ( K#6 ) = COMMUCDATA( hw_const#8 == PERMRF_0[0], hw_const#0 == UNITRF_0_1[0], uc_const#0x29cf29cf == UCRF_0[14] )
    // OUT:COMM_SCHED_0: COMMUCDATA => ( K#6 == MULRF_0_1[1] )
    //  IN:ADDER_0: ( quant#2 ) = SHIFT16( tmp#9 == UNITRF_0_2[1], const#-1 == UNITRF_1_1[3] )
    // OUT:ADDER_0: SHIFT16 => ( quant#2 == MULRF_1_1[1] )
    // OUT:MULTIPLIER_1: UMULRND16 => ( tmp#15 == UNITRF_0_4[2] )
    // OUT:ADDER_2: ISUB32 => ( tmp#29 == UNITRF_1_1[4] )
    //  IN:ADDER_1: ( tmp#30 ) = OR( hw_const#1 == UNITRF_1_2[0], tmp#27 == UNITRF_0_3[1] )
    // OUT:ADDER_1: OR => ( tmp#30 == UNITRF_1_3[2], tmp#30 == MULRF_0_0[3], tmp#30 == UNITRF_1_2[2], tmp#30 == UNITRF_0_2[1] )
    DEAD_REGS: {  };
instr: 16
    MC: OP: UC_DATA_IN LINE:92 IMM:0x7654321 UCRF_RD:13 UCRF_WR:2 STAGES:-1,
    U7: OP: COMMUCDATA LINE:-1 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:-1
    U0: OP: SHIFT16 LINE:103 STAGE:-1, // D:\working\im_apps\h264\dct_kc.i:103
    B:31 = U2:OUT:0 INSTR_LOG:2|tmp#35#||0 VAR: tmp#35 DATATYPE: INT,
    RF:3:IN:0:REG:1 = B:31 STAGE:-1 VAR: tmp#35 DATATYPE: INT,
    B:9 = RF:15:OUT:0:REG:0 VAR: hw_const#8 DATATYPE: ANYINT,
    U7:IN:1 = B:9 VAR: hw_const#8 DATATYPE: ANYINT,
    B:8 = RF:2:OUT:0:REG:0 VAR: hw_const#0 DATATYPE: ANYINT,
    U7:IN:0 = B:8 VAR: hw_const#0 DATATYPE: ANYINT,
    B:27 = U7:OUT:0 INSTR_LOG:1|K#5#||0 VAR: K#5 DATATYPE: HALF2,
    RF:13:IN:0:REG:2 = B:27 STAGE:-1 VAR: K#5 DATATYPE: HALF2,
    B:12 = RF:3:OUT:0:REG:1 VAR: tmp#28 DATATYPE: UHALF2,
    U0:IN:0 = B:12 VAR: tmp#28 DATATYPE: UHALF2,
    B:13 = RF:7:OUT:0:REG:4 VAR: tmp#29 DATATYPE: INT,
    U0:IN:1 = B:13 VAR: tmp#29 DATATYPE: INT,
    B:29 = U0:OUT:0 INSTR_LOG:1|uh2_half#||0 VAR: uh2_half DATATYPE: UHALF2,
    RF:5:IN:0:REG:1 = B:29 STAGE:-1 VAR: uh2_half DATATYPE: UHALF2,
    RF:14:IN:0:REG:1 = B:29 STAGE:-1 VAR: uh2_half DATATYPE: UHALF2,
    RF:15:IN:0:REG:1 = B:29 STAGE:-1 VAR: uh2_half DATATYPE: UHALF2,