(0302) 	delay();
     16C DFBE      RCALL	_delay
(0303)   	SPI_RW(reg);            // Select register to read from..
     16D 2D0A      MOV	R16,R10
     16E DFD4      RCALL	_SPI_RW
(0304)   	reg_val = SPI_RW(0);    // ..then read registervalue
     16F 2700      CLR	R16
     170 DFD2      RCALL	_SPI_RW
     171 2EA0      MOV	R10,R16
(0305) 	nRF24L01_CSNH;
     172 9A5E      SBI	0x0B,6
(0306) 	delay();
     173 DFB7      RCALL	_delay
(0307)   	return(reg_val);        // return register value
     174 2D0A      MOV	R16,R10
     175 90B9      LD	R11,Y+
     176 90A9      LD	R10,Y+
     177 9508      RET
_SPI_Read_Buf:
  status               --> R10
  byte_ctr             --> R12
  bytes                --> Y,+6
  pBuf                 --> R14
  reg                  --> R10
     178 D089      RCALL	push_xgset00FC
     179 0179      MOVW	R14,R18
     17A 2EA0      MOV	R10,R16
(0308) }
(0309) /**************************************************
(0310) Function: SPI_Read_Buf();
(0311) 
(0312) Description:
(0313)   Reads 'bytes' #of bytes from register 'reg'
(0314)   Typically used to read RX payload, Rx/Tx address */
(0315) /**************************************************/
(0316) unsigned char SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
(0317) {
(0318) 	unsigned char status,byte_ctr;
(0319) 	nRF24L01_CSNL;
     17B 985E      CBI	0x0B,6
(0320) 	delay();
     17C DFAE      RCALL	_delay
(0321)   	status = SPI_RW(reg);       		// Select register to write to and read status byte
     17D 2D0A      MOV	R16,R10
     17E DFC4      RCALL	_SPI_RW
     17F 2EA0      MOV	R10,R16
(0322) 	for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
     180 24CC      CLR	R12
     181 C008      RJMP	0x018A
(0323)     	pBuf[byte_ctr] = SPI_RW(0);    // Perform SPI_RW to read byte from nRF24L01
     182 2700      CLR	R16
     183 DFBF      RCALL	_SPI_RW
     184 2DEC      MOV	R30,R12
     185 27FF      CLR	R31
     186 0DEE      ADD	R30,R14
     187 1DFF      ADC	R31,R15
     188 8300      STD	Z+0,R16
     189 94C3      INC	R12
     18A 800E      LDD	R0,Y+6
     18B 14C0      CP	R12,R0
     18C F3A8      BCS	0x0182
(0324) 	nRF24L01_CSNH;
     18D 9A5E      SBI	0x0B,6
(0325) 	delay();
     18E DF9C      RCALL	_delay
(0326)   	return(status);                    // return nRF24L01 status byte
     18F 2D0A      MOV	R16,R10
     190 C066      RJMP	pop_xgset00FC
_SPI_Write_Buf:
  status               --> R10
  byte_ctr             --> R12
  bytes                --> Y,+6
  pBuf                 --> R14
  reg                  --> R10
     191 D070      RCALL	push_xgset00FC
     192 0179      MOVW	R14,R18
     193 2EA0      MOV	R10,R16
(0327) }
(0328) /**************************************************
(0329) Function: SPI_Write_Buf();
(0330) 
(0331) Description:
(0332)   Writes contents of buffer '*pBuf' to nRF24L01
(0333)   Typically used to write TX payload, Rx/Tx address */
(0334) /**************************************************/
(0335) unsigned char SPI_Write_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes)
(0336) {
(0337) 	unsigned char status,byte_ctr;
(0338) 	nRF24L01_CSNL;                   		// Set nRF24L01_CSN low, init SPI tranaction
     194 985E      CBI	0x0B,6
(0339)   	delay();
     195 DF95      RCALL	_delay
(0340) 	status = SPI_RW(reg);    					// Select register to write to and read status byte
     196 2D0A      MOV	R16,R10
     197 DFAB      RCALL	_SPI_RW
     198 2EA0      MOV	R10,R16
(0341)   	for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
     199 24CC      CLR	R12
     19A C006      RJMP	0x01A1
(0342)     	status = SPI_RW(*pBuf++);            
     19B 01F7      MOVW	R30,R14
     19C 9101      LD	R16,Z+
     19D 017F      MOVW	R14,R30
     19E DFA4      RCALL	_SPI_RW
     19F 2EA0      MOV	R10,R16
     1A0 94C3      INC	R12
     1A1 800E      LDD	R0,Y+6
     1A2 14C0      CP	R12,R0
     1A3 F3B8      BCS	0x019B
(0343) 	nRF24L01_CSNH; 								// Set nRF24L01_CSN high again
     1A4 9A5E      SBI	0x0B,6
(0344) 	delay();
     1A5 DF85      RCALL	_delay
(0345)   	return(status);          					// return nRF24L01 status byte
     1A6 2D0A      MOV	R16,R10
     1A7 C04F      RJMP	pop_xgset00FC
_RX_Mode:
     1A8 9721      SBIW	R28,1
(0346) }
(0347) /**************************************************
(0348) Function: RX_Mode();
(0349) 
(0350) Description:
(0351)   This function initializes one nRF24L01 device to
(0352)   RX Mode, set RX address, writes RX payload width,
(0353)   select RF channel, datarate & LNA HCURR.
(0354)   After init, CE is toggled high, which means that
(0355)   this device is now ready to receive a datapacket. */
(0356) /**************************************************/
(0357) void RX_Mode(void)
(0358) {
(0359) 	nRF24L01_CEL;
     1A9 985F      CBI	0x0B,7
(0360) 	delay();
     1AA DF80      RCALL	_delay
(0361)   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // Use the same address on the RX device as the TX device
     1AB E085      LDI	R24,5
     1AC 8388      STD	Y+0,R24
     1AD E420      LDI	R18,0x40
     1AE E031      LDI	R19,1
     1AF E20A      LDI	R16,0x2A
     1B0 DFE0      RCALL	_SPI_Write_Buf
(0362) 
(0363)   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
     1B1 E021      LDI	R18,1
     1B2 E201      LDI	R16,0x21
     1B3 DFA6      RCALL	_SPI_RW_Reg
(0364)   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
     1B4 E021      LDI	R18,1
     1B5 E202      LDI	R16,0x22
     1B6 DFA3      RCALL	_SPI_RW_Reg
(0365)   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
     1B7 E228      LDI	R18,0x28
     1B8 E205      LDI	R16,0x25
     1B9 DFA0      RCALL	_SPI_RW_Reg
(0366)   	SPI_RW_Reg(WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH); // Select same RX payload width as TX Payload width
     1BA E124      LDI	R18,0x14
     1BB E301      LDI	R16,0x31
     1BC DF9D      RCALL	_SPI_RW_Reg
(0367)   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
     1BD E027      LDI	R18,7
     1BE E206      LDI	R16,0x26
     1BF DF9A      RCALL	_SPI_RW_Reg
(0368)   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0f);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
     1C0 E02F      LDI	R18,0xF
     1C1 E200      LDI	R16,0x20
     1C2 DF97      RCALL	_SPI_RW_Reg
(0369)   	nRF24L01_CEH;
     1C3 9A5F      SBI	0x0B,7
(0370) 	delay();
     1C4 DF66      RCALL	_delay
     1C5 9621      ADIW	R28,1
     1C6 9508      RET
_TX_Mode:
     1C7 9721      SBIW	R28,1
(0371) 	//  This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
(0372)   //  '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
(0373) 
(0374) }
(0375) /**************************************************/
(0376) 
(0377) /**************************************************
(0378) Function: TX_Mode();
(0379) 
(0380) Description:
(0381)   This function initializes one nRF24L01 device to
(0382)   TX mode, set TX address, set RX address for auto.ack,
(0383)   fill TX payload, select RF channel, datarate & TX pwr.
(0384)   PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
(0385) 
(0386)   ToDo: One high pulse(>10us) on CE will now send this
(0387)   packet and expext an acknowledgment from the RX device. */
(0388) /**************************************************/
(0389) void TX_Mode(void)
(0390) {
(0391) 	nRF24L01_CEL;
     1C8 985F      CBI	0x0B,7
(0392) 	delay();
     1C9 DF61      RCALL	_delay
(0393)   	SPI_Write_Buf(WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH);    // Writes TX_Address to nRF24L01
     1CA E085      LDI	R24,5
     1CB 8388      STD	Y+0,R24
     1CC E420      LDI	R18,0x40
     1CD E031      LDI	R19,1
     1CE E300      LDI	R16,0x30
     1CF DFC1      RCALL	_SPI_Write_Buf
(0394)   	SPI_Write_Buf(WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH); // RX_Addr0 same as TX_Adr for Auto.Ack
     1D0 E085      LDI	R24,5
     1D1 8388      STD	Y+0,R24
     1D2 E420      LDI	R18,0x40
     1D3 E031      LDI	R19,1
     1D4 E20A      LDI	R16,0x2A
     1D5 DFBB      RCALL	_SPI_Write_Buf
(0395)   	SPI_Write_Buf(WR_TX_PLOAD, Buffer, TX_PLOAD_WIDTH); // Writes data to TX payload
     1D6 E184      LDI	R24,0x14
     1D7 8388      STD	Y+0,R24
     1D8 E020      LDI	R18,0
     1D9 E031      LDI	R19,1
     1DA EA00      LDI	R16,0xA0
     1DB DFB5      RCALL	_SPI_Write_Buf
(0396) 
(0397)   	SPI_RW_Reg(WRITE_REG + EN_AA, 0x01);      // Enable Auto.Ack:Pipe0
     1DC E021      LDI	R18,1
     1DD E201      LDI	R16,0x21
     1DE DF7B      RCALL	_SPI_RW_Reg
(0398)   	SPI_RW_Reg(WRITE_REG + EN_RXADDR, 0x01);  // Enable Pipe0
     1DF E021      LDI	R18,1
     1E0 E202      LDI	R16,0x22
     1E1 DF78      RCALL	_SPI_RW_Reg
(0399)   	SPI_RW_Reg(WRITE_REG + SETUP_RETR, 0x1a); // 500us + 86us, 10 retrans...
     1E2 E12A      LDI	R18,0x1A
     1E3 E204      LDI	R16,0x24
     1E4 DF75      RCALL	_SPI_RW_Reg
(0400)   	SPI_RW_Reg(WRITE_REG + RF_CH, 40);        // Select RF channel 40
     1E5 E228      LDI	R18,0x28
     1E6 E205      LDI	R16,0x25
     1E7 DF72      RCALL	_SPI_RW_Reg
(0401)   	SPI_RW_Reg(WRITE_REG + RF_SETUP, 0x07);   // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
     1E8 E027      LDI	R18,7
     1E9 E206      LDI	R16,0x26
     1EA DF6F      RCALL	_SPI_RW_Reg
(0402)   	SPI_RW_Reg(WRITE_REG + CONFIG, 0x0e);     // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
     1EB E02E      LDI	R18,0xE
     1EC E200      LDI	R16,0x20
     1ED DF6C      RCALL	_SPI_RW_Reg
(0403) 	nRF24L01_CEH;
     1EE 9A5F      SBI	0x0B,7
(0404) 	delay();
FILE: <library>
     1EF DF3B      RCALL	_delay
     1F0 9621      ADIW	R28,1
     1F1 9508      RET
pop_xgset003C:
     1F2 90A9      LD	R10,Y+
     1F3 90B9      LD	R11,Y+
     1F4 90C9      LD	R12,Y+
     1F5 90D9      LD	R13,Y+
     1F6 9508      RET
pop_xgset00FC:
     1F7 90A9      LD	R10,Y+
     1F8 90B9      LD	R11,Y+
     1F9 90C9      LD	R12,Y+
     1FA 90D9      LD	R13,Y+
     1FB 90E9      LD	R14,Y+
     1FC 90F9      LD	R15,Y+
     1FD 9508      RET
push_xgsetF0FC:
     1FE 937A      ST	R23,-Y
     1FF 936A      ST	R22,-Y
push_xgset30FC:
     200 935A      ST	R21,-Y
     201 934A      ST	R20,-Y
push_xgset00FC:
     202 92FA      ST	R15,-Y
     203 92EA      ST	R14,-Y
push_xgset003C:
     204 92DA      ST	R13,-Y
     205 92CA      ST	R12,-Y
     206 92BA      ST	R11,-Y
     207 92AA      ST	R10,-Y
     208 9508      RET
push_xgsetF000:
     209 937A      ST	R23,-Y
     20A 936A      ST	R22,-Y
     20B 935A      ST	R21,-Y
     20C 934A      ST	R20,-Y
     20D 9508      RET
pop_xgsetF000:
     20E 9149      LD	R20,Y+
     20F 9159      LD	R21,Y+
     210 9169      LD	R22,Y+
     211 9179      LD	R23,Y+
     212 9508      RET