/*
*********************************************************************************************************
* 文件: InitInt.C
* 描述: 初始化中斷優先級等設置,請仔細控制此處的開中斷.
* 編寫: 深思 (001-12345@sohu.com).
*********************************************************************************************************
*/
#include "44b0x.h"

void InitInt (void)
{
#define  V      0       // 0 = Vectored interrupt mode 1 = Non-vectored interrupt mode
#define  I      0       // 0 = IRQ interrupt enable
#define  F      1       // 0 = FIQ interrupt enable (Not allowed vectored interrupt mode) 1 = Reserved
    INTCON = ((V<<2)+(I<<1)+F);

//               EINT0   EINT1   EINT2   EINT3  EINT4567  TICK   ZDMA0   ZDMA1   BDMA0   BDMA1   WDT   UERR0/1   TIMER0  TIMER1  TIMER2  TIMER3  TIMER4 TIMER5  URXD0  URXD1  IIC  SIO     UTXD0  UTXD1  RTC   ADC.
// 0 = IRQ mode 1 = FIQ mode
    INTMOD   = ((0<<25)+(0<<24)+(0<<23)+(0<<22)+(0<<21)+(0<<20)+(0<<19)+(0<<18)+(0<<17)+(0<<16)+(0<<15)+(0<<14)+(0<<13)+(0<<12)+(0<<11)+(0<<10)+(0<<9)+(0<<8)+(0<<7)+(0<<6)+(0<<5)+(0<<4)+(0<<3)+(0<<2)+(0<<1)+0);
// 0 = Service available 1 = Masked
    INTMSK   = ((1<<25)+(1<<24)+(1<<23)+(1<<22)+(1<<21)+(1<<20)+(1<<19)+(1<<18)+(1<<17)+(1<<16)+(1<<15)+(1<<14)+(1<<13)+(1<<12)+(1<<11)+(1<<10)+(1<<9)+(1<<8)+(1<<7)+(1<<6)+(1<<5)+(1<<4)+(1<<3)+(1<<2)+(1<<1)+1);

// IRQ priority of slave register
    I_PSLV = 0x1b1b1b1b;
// IRQ priority of master register
    I_PMST = 0x00001f1b;
// IRQ interrupt service pending clear register
    I_ISPC = I_ISPR;                            // Clear all pending.
// FIQ interrupt service pending clear register
    F_ISPC = F_ISPR;                            // Clear all pending.

    EXTINTPND = 0x0f;                           // External(4,5,6,and 7) interrupt pending Register. cleared by writing 1.
}

/*
********************************************************************************************************
* End.
********************************************************************************************************
*/